Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Isolation by pn junction only
Patent
1996-07-26
1997-08-26
Niebling, John
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Isolation by pn junction only
438220, 438527, H01L 21265
Patent
active
056610670
ABSTRACT:
An improved twin well formation method for a semiconductor device capable of improving the latch-up characteristic in DRAM device which requires a high integration density and of improving a recess problem which occurs due to the capacitor, which includes the steps of a first step which forms an insulation film on a semiconductor substrate having a first region and a second region; a second step which forms a first temporary film on an insulation film of the first region; a third step which forms a first side wall spacer at the first temporary side wall; a fourth step which implants a first conductive ion to a substrate of a second region; a fifth step which forms a second temporary film on a substrate of the second region; a sixth step which removes the first temporary film; a seventh step which implants a second conductive ion to a substrate of the first region; and an eighth step which anneals and removes the second temporary film and the first insulation spacer.
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Kim Jong Kwan
Lee Chang-Jae
LG Semicon Co. Ltd.
Niebling John
Pham Long
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