Semiconductor device manufacturing: process – Making passive device – Trench capacitor
Reexamination Certificate
2001-06-25
2003-01-21
Le, Vu A. (Department: 2824)
Semiconductor device manufacturing: process
Making passive device
Trench capacitor
C438S243000
Reexamination Certificate
active
06509244
ABSTRACT:
BACKGROUND
1. Technical Field
A method for fabricating a semiconductor device, and in particular to an improved method for forming a storage node electrode of a high integration semiconductor device is disclosed.
2. Description of the Background Art
Recently, reductions in cell surface area and operation voltage have been actively investigated in order to achieve a highly integrated semiconductor device. In a highly integrated semiconductor device, the area of a capacitor is sharply reduced. Therefore, it is required to increase charges for the operation of the memory device, namely capacitance per unit area.
On the other hand, the capacitor for a memory cell basically consists of a storage node electrode, a dielectric film and a plate node electrode. A useful capacitor for obtaining high capacitance in a small area has a desired characteristic: a dielectric film that is thin, with an effective area is increased by the three-dimensional structure of the capacitor, or the dielectric film is composed of a material having a high dielectric constant.
In general, when a leakage current is decreased and a breakdown voltage is increased, the capacitor obtains a good dielectric film. However, when the dielectric film has a thickness of less than 100 Å, the leakage current is increased due to a phenomenon known as Fowler-Nordheim tunneling, thereby reducing reliability. In addition, a method for using the material having the high dielectric constant in the memory cell capacitor has been investigated, so that high capacitance can be obtained. even in the small area of the high integration memory device. At last, a method for increasing an area of the storage node electrode through the three-dimensional structure has been suggested to increase the effective area of the capacitor.
A semiconductor device such as 256M DRAM has normally employed an inner cylinder type storage node electrode. A conventional method for forming the inner cylinder type storage node electrode will now be described with reference to the accompanying drawings.
FIGS. 1
a
to
1
d
illustrate sequential steps of the conventional method for forming the storage node electrode of the semiconductor device.
One preferred example of the conventional method uses a polysilicon hard mask. Referring to
FIG. 1
a
, a contact plug
14
is formed in an interlayer insulation film
12
of a semiconductor substrate
10
where a predetermined device structure has been formed. Thereafter, etch stop films
16
,
18
, a sacrificed insulation film
20
, a polysilicon hard mask
22
and a reflection stop film
24
are sequentially stacked on the whole surface of the interlayer insulation film
12
where the contact hole
14
has been formed. Here, reference numeral
16
denotes a nitride film which serves as the etch stop film of the sacrificed insulation film
20
, and reference numeral
18
denotes a high density plasma (HDP) film which serves as the etch stop film and dip-out of the sacrificed insulation film
20
.
As illustrated in
FIG. 1
b
, in order to provide a region for the storage node electrode, an opening
26
is formed by etching the hard mask
22
′, the sacrificial insulation film
20
′ and the etch stop film
18
′. According to the etching process, the reflection stop film
24
is removed, and the polysilicon hard mask
22
′ is partially etched. The etch stop film
16
remains unaltered.
Referring to
FIG. 1
c
, if etching the hard mask
22
′ remains on the resultant structure where the opening
26
has been formed, the sacrificial insulation film
20
′ is partially damaged. Thereafter, when the etch stop film
16
′ is patterned to expose the surface of the contact plug, the sacrificial insulation film
20
′ is damaged again. The loss of the sacrificial insulation film
20
′ influences the height of the inner cylinder type storage node electrode. Therefore, when the hard mask film
22
′ and the etch stop films
16
′,
18
′ are removed, the loss of the sacrificial insulation film
20
′ must be minimized.
As depicted in
FIG. 1
d
, a conductive material is deposited on the opening
26
, thereby forming the inner cylinder type storage node electrode
28
. A filling film (not shown) is formed to fill up the opening part
26
, and its surface is polished. Thereafter, the sacrificial insulation film
20
′ is removed, and a dielectric film
30
and a plate node electrode
32
are sequentially formed on the storage node electrode
28
. Thus, fabrication of the capacitor is finished.
As described above, when the hard mask film and the etch stop film are removed, the inner cylinder type storage node electrode
28
is excessively damaged. As a result, the area of the storage node electrode is decreased, and thus capacity of the capacitor is also reduced.
FIGS. 2
a
and
2
b
illustrate sequential steps of another conventional method for forming a storage node electrode of a semiconductor device, which has been thought to reduce the loss of the sacrificed insulation film.
As illustrated in
FIG. 2
a
, the hard mask film
22
, the sacrificial insulation film
20
′ and the etch stop films
18
′,
16
′ which are stacked as in the above-described method are etched to form the opening.
Thereafter, the inner cylinder type storage node electrode
28
is formed by depositing the conductive material on the resultant structure. The filling film
29
is formed to fill up the opening part. Then, the whole surface is polished according to a chemical mechanical polishing process.
As shown in
FIG. 2
b
, the polishing process is performed until the hard mask
22
′ is removed. At this time, a cell region
100
has higher density than a peripheral region
200
, and thus a polishing speed of the cell region is increased. As a result, a T-shaped step is formed between the peripheral region
200
and the cell region
100
.
Therefore, the capacity of the capacitor is much smaller in the cell region than the peripheral region. Accordingly, the method using the chemical mechanical polishing process increases the step between the peripheral region and the cell region, and reduces the capacity of the capacitor in the cell region, thereby deteriorating the property of the device.
SUMMARY OF THE DISCLOSURE
A storage node electrode of a semiconductor device is disclosed, which prevents an etch step of a sacrificial insulation film between a peripheral region and a cell region, and which minimizes an etch loss of the sacrificial insulation film. The disclosed method involves forming an opening part for the inner cylinder type storage node electrode, forming the storage node electrode and a filling film for filling up the opening, etching the resultant structure until a polysilicon hard mask reaches a predetermined thickness, and removing the hard mask according to a chemical mechanical polishing process.
A disclosed method for forming a storage node electrode of a semiconductor device comprises: forming a contact plug in an interlayer insulation film on a semiconductor substrate where a predetermined device structure has been formed; sequentially stacking at least one etch stop film, a sacrificial insulation film, a polysilicon hard mask and a reflection stop film on the whole surface of the interlayer insulation film where the contact plug has been formed; forming an opening in the hard mask, the sacrificial insulation film and the etch stop films to remove the reflection stop film to obtain a storage node electrode region; forming a storage node electrode by depositing a conductive material over the resultant structure where the opening has been formed; forming a filling film for filling up the opening; etching the filling film, the storage node electrode and the hard mask so that the hard mask has a predetermined thickness; and etching the resultant structure according to a chemical mechanical polishing process so that the residual hard mask can be completely removed.
The method for forming the storage node electrode of the semiconductor device ma
Kim Chang-Il
Oh Chen-kwon
Hynix / Semiconductor Inc.
Le Vu A.
Marshall Gerstein & Borun
Owens Beth E.
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