Method for forming stacked via-holes in printed circuit boards

Details Method for forming stacked via-holes in printed circuit boards Method for forming stacked via-holes in printed circuit boards

2006-10-13

2009-02-10

Vinh, Lan (Department: 1792)

Etching a substrate: processes

Forming or treating electrical conductor article

Forming or treating of groove or through hole

C257S760000

Reexamination Certificate

active

07488428

ABSTRACT:
A method for forming stacked via-holes on a printed circuit board includes the steps of: providing a printed circuit board having a conductive trace formed on a side surface thereof; forming a first copper-clad laminate on the side surface having the conductive trace; forming a number of first copper micro-via in a copper layer of the first copper-clad laminate; forming a second copper-clad laminate on the surface of the copper layer having the first copper micro-via of the first copper-clad laminate; forming a number of second copper micro-via in a copper layer of the second copper-clad laminate by a first laser on the basis of the first copper micro-via, each second copper micro-via being located corresponding to its correspondingly first copper micro-via; and removing corresponding resin layer portions of the first and second copper-clad laminates, using a second laser, to yield the respective stacked via-holes.

REFERENCES:
patent: 7078816 (2006-07-01), Japp et al.
patent: 2004/0043310 (2004-03-01), Takeishi et al.
patent: 2004/0178492 (2004-09-01), Tsukamoto et al.
patent: 2006/0191133 (2006-08-01), Nakao et al.
patent: 520630 (2003-02-01), None
patent: 200614891 (2005-05-01), None
Jin-Du Lin, “Application of RCC in HDI/BUM”, Printed Circuit Information, Apr. 2002, pp. 8 to 11, 2002 (4), 1994-2008 China Academic Journal Electronic Publishing House, China.

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