Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2005-01-18
2005-01-18
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S424000, C438S435000, C438S437000
Reexamination Certificate
active
06844239
ABSTRACT:
A method for forming a shallow well of a semiconductor device using low-energy ion implantation is described. A well region is formed to the depth of a trench isolation layer using a low-energy, high-dose ion implantation process. The method for forming a well using low-energy ion implantation can minimize well margin reduction caused by impurity spread and well margin reduction caused by shrinkage of a thick photoresist pattern.
REFERENCES:
patent: 5563091 (1996-10-01), Lee
patent: 5770504 (1998-06-01), Brown et al.
patent: 6144086 (2000-11-01), Brown et al.
patent: 6248645 (2001-06-01), Matsuoka et al.
patent: 20020086499 (2002-07-01), Sridhar et al.
Lebentritt Michael S.
Marger & Johnson & McCollom, P.C.
Wilson Christian D.
LandOfFree
Method for forming shallow well of semiconductor device... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming shallow well of semiconductor device..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming shallow well of semiconductor device... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3438225