Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1997-12-10
2000-05-09
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
216 38, 438719, 438723, H01L 2100
Patent
active
060603941
ABSTRACT:
This invention describes a method to form shallow trench isolation with global planarization. The process steps consist of depositing the etching-resistant masked layers stacked on silicon substrate, where the isolated area region is defined; then the isolated area region is dryly etched and is to be deposited oxidation-resistant thin films and form oxidation-resistant spacers around the side walls of the isolated region with the deposited thin films. Because the thin films and spacers are oxidation resistant, during growth of an oxide film within the isolated area, the bird's beak lateral encroachment can be prevented. This results in nearly abrupt interfaces at the sides of the isolated area. In addition, a high temperature oxidation process is employed to produce a high quality of oxide film and simultaneously recover the possible damages from dry etching. This method for forming shallow trench isolation provides a better global planarization, providing a smoother platform on which further circuit elements can be built.
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Powell William
Texas Instruments--Acer Incorporated
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