Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2007-02-13
2007-02-13
Thai, Luan (Department: 2891)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S294000, C438S295000, C438S296000
Reexamination Certificate
active
10863540
ABSTRACT:
The present invention relates to a shallow trench isolation structure and a method for forming a shallow trench isolation structure on a semiconductor substrate. A masking structure that includes a hard mask is formed over the semiconductor substrate and an etch is performed so as to form trenches within the semiconductor substrate. A shallow trench isolation structure and a method for forming a shallow trench isolation structure are disclosed. Oxidation enhancing species are then implanted into the bottom surface of the trenches and an oxidation process is performed. The oxidation enhancing species will form a deep oxidation region below the bottom surface of each trench and will form thinner oxidation regions within side surfaces of trenches. A layer of dielectric material is then deposited to fill the trenches. A chemical mechanical polishing process is performed to remove those portions of the dielectric film that overlie the hard mask. The hard mask is then removed, producing a void-free shallow trench isolation structure.
REFERENCES:
patent: 4563227 (1986-01-01), Sakai
patent: 4663832 (1987-05-01), Jambotkar
patent: 4871685 (1989-10-01), Taka
patent: 4916086 (1990-04-01), Takahashi
patent: 4923821 (1990-05-01), Namose
patent: 4931409 (1990-06-01), Nakajima
patent: 4992390 (1991-02-01), Chang
patent: 5084408 (1992-01-01), Baba
patent: 5258332 (1993-11-01), Horioka
patent: 5350941 (1994-09-01), Madan
patent: 5433794 (1995-07-01), Fazan et al.
patent: 5521422 (1996-05-01), Mandelman
patent: 5567270 (1996-10-01), Liu
patent: 5578518 (1996-11-01), Koike et al.
patent: 5807784 (1998-09-01), Kim
patent: 5811347 (1998-09-01), Gardner et al.
patent: 6228720 (2001-05-01), Kitabatake et al.
patent: 6238998 (2001-05-01), Leobandung
patent: 6255717 (2001-07-01), Babcock et al.
patent: 6258676 (2001-07-01), Lee et al.
patent: 6333232 (2001-12-01), Kunikiyo
patent: 6444528 (2002-09-01), Murphy
patent: 6514833 (2003-02-01), Ishida et al.
patent: 6541350 (2003-04-01), Chen
patent: 6541382 (2003-04-01), Cheng et al.
patent: 6576558 (2003-06-01), Lin et al.
patent: 6645867 (2003-11-01), Dokumaci et al.
patent: 6645868 (2003-11-01), Babcock et al.
patent: 6680239 (2004-01-01), Cha et al.
patent: 6689665 (2004-02-01), Jang et al.
patent: 6921699 (2005-07-01), Ma et al.
patent: 7012005 (2006-03-01), Lichtenberger et al.
Planarization and Integration of Shallow Trench Isolation, Pan et al., 1999 VMIC, Santa Clara, CA, Jun. 1998.
Chen Chih-Hsiang
Lo Guo-Qiang
Glass Kenneth
Glass & Associates
Integrated Device Technology Inc.
Thai Luan
LandOfFree
Method for forming shallow trench isolation structure with... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming shallow trench isolation structure with..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming shallow trench isolation structure with... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3869518