Method for forming shallow trench isolation of semiconductor...

Details Method for forming shallow trench isolation of semiconductor... Method for forming shallow trench isolation of semiconductor...

2006-12-28

2008-09-30

Smith, Bradley K (Department: 2891)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Having air-gap dielectric

C438S400000, C257SE21540

Reexamination Certificate

active

07429518

ABSTRACT:
A shallow trench isolation well is formed to be very thin in a highly integrated semiconductor device. When critical dimension (CD) is small, it is difficult to reduce the width of the photosensitive layer pattern for forming a trench to no more than a predetermined value due to limitations on the photolithography process.

REFERENCES:
patent: 5294476 (1994-03-01), Calhoun
patent: 2007/0187357 (2007-08-01), Guerriero

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