Method for forming shallow trench isolation

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S437000, C438S701000, C438S713000, C438S978000

Reexamination Certificate

active

06200880

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates in general to a method for forming isolation, and more specifically relates to a method for forming shallow trench isolation (STI) which effectively reduces the kink effect.
2. Description of Related Art
There may be hundreds of thousands of devices formed on a single silicon substrate within an area of about 1-2 cm
2
. In order to keep the devices from disturbing each other, the existence of isolation regions formed between the devices is very important for modern semiconductor manufacturing technology. The local oxidation of silicon (LOCOS) is used widely for forming isolation regions in a conventional method. Another method for forming isolation regions is shallow trench isolation (STI,) by which a trench is formed within a substrate and is filled with insulator. The STI method is a necessary technology for process under 0.25 &mgr;m.
FIGS. 1A through 1D
schematically illustrate a conventional manufacturing process for forming a shallow trench isolation (STI) structure. Referring to
FIG. 1A
, a pad oxide
11
and a mask layer
12
are sequentially formed on a semiconductor substrate
10
and are patterned by photolithography and etching technologies. A trench
13
inside he substrate
10
is formed by anisotropic etching.
Referring to
FIG. 1B
, a liner oxide
14
is formed along the sidewalls and the bottom of the trench
13
. Afterwards, an insulation layer is deposited on the mask layer
12
and fills the trench
13
. With the help of chemical mechanic polishing (CMP), the insulation layer outside the trench
23
is removed and an insulation plug
15
is formed thereafter, as shown in
FIG. 1C. A
shallow trench isolation structure is then formed as shown in
FIG. 1D
after the mask layer
12
and the pad oxide
11
are removed.
Because the step for removing the pad oxide
11
uses isotropic etching, an over etching effect easily occurs at the edges of the insulation plug
15
by which a narrow dished portion
19
is formed and exposes a sharp corner
16
. The sharp corner
16
easily accumulates electric charges, which will reduce the threshold voltage of devices to produce an abnormal sub-threshold current, called the kink effect. Therefore, the quality and the yield of devices are reduced.
At present time, the method mostly adapted for improving the kink effect is to change the corner shape so as to reduce the sub-threshold current. Rounding the sharp corner is a method for reducing the kink effect, and a rounded corner
17
is shown in FIG.
1
E. Another conventional method for reducing the kink effect is to fill the narrow dished portion with insulator. However, the sub-threshold current is still produced even when the corner shape is changed. A large amount of the electric charge is induced by plasma used in the following processes, which the induced charges accumulate around the corner of the trench so that the kink effect occurs again.
SUMMARY OF THE INVENTION
According to the foregoing description, an object of this invention is to provide an improved manufacturing process for forming a shallow trench isolation structure. A dielectric thin film (such as Si
3
N
4
film) and devices are deposited on the whole device surface after the shallow trench isolation and is formed by which the dielectric thin film can prevent H
+
penetration induced by plasma process thereafter do not accumulate charges around the corner, which prevents a kink effect and leakage.
In accordance with the foregoing objective, a manufacturing process for forming a shallow trench isolation structure is provided. A pad oxide and a mask layer are formed sequentially on a substrate. After patterning the mask layer and the pad oxide, a trench is formed within the substrate. An insulation layer is formed and fills the trench to form an insulation plug. The insulation layer, the mask layer and the pad oxide outside the trench are removed to form a shallow trench isolation structure, and a dielectric layer is formed to cover the whole surface. The material of the dielectric layer can isolate the large amount of electric charges induced by plasma in the following process, which can significantly reduce the kink effect.


REFERENCES:
patent: 4419813 (1983-12-01), Iwai
patent: 4491486 (1985-01-01), Iwai
patent: 4571819 (1986-02-01), Rogers et al.
patent: 5366925 (1994-11-01), Lur et al.
patent: 5482879 (1996-01-01), Hong
patent: 5624865 (1997-04-01), Schuegraf et al.
patent: 5726090 (1998-03-01), Jang et al.
patent: 5780346 (1998-07-01), Arghavani et al.
patent: 5817567 (1998-10-01), Jang et al.
patent: 5834341 (1998-11-01), Chen
patent: 5953613 (1999-09-01), Gardner et al.
Wolf, et al., “Silicon Processing For The VLSI Era”, 1986, vol. 1, pp. 168-169.

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