Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2002-05-14
2004-04-06
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S123000, C438S120000, C438S107000
Reexamination Certificate
active
06716668
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a semiconductor module, and more particularly, the present invention relates to a pattern shape for a contacting portion formed on a printed wiring board.
This application is a counterpart of Japanese application Serial Number 257637/1999, filed Sep. 10, 1999, the subject matter of which is incorporated herein by reference.
2. Description of the Related Art
In a conventional art, a lead frame is designed as having a die pad based on a size of a semiconductor chip and an inner lead in consideration of a wire length and the number of pins.
It is desired to provide an applicable lead frame for several sizes of a semiconductor chip.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method for forming a semiconductor device that can provide an applicable lead frame for several sizes of a semiconductor chip.
According to one aspect of the present invention, for achieving the above object, there is provided a method for forming a semiconductor device that includes providing a lead frame which has a die pad and a plurality of leads extending toward outside from the die pad, mounting a semiconductor chip on the die pad, defining a plurality of inner leads by cutting a predetermined cut portion on each of the leads located around the semiconductor chip, and bonding a wire between each of inner leads and the semiconductor chip.
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Oki Electric Industry Co. Ltd.
Rocchegiani Renzo N
Smith Matthew
Volentine & Francos, PLLC
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