Method for forming semiconductor contacts

Coating processes – Electrical product produced – Condenser or capacitor

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148 15, 156653, 156657, 427 89, 427 93, H01L 2948, H01L 21441

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active

042333377

ABSTRACT:
A method for selectively depositing contacts in semiconductor regions. One set of contact openings is protected by a barrier layer during the metallization of another set of exposed contact openings to improve the cleanliness and reliability of the contacts. The barrier layer is then removed and a second layer of metallization is deposited in both sets of openings. In the preferred embodiment a standard diffusion mask is used to define all contact regions and a screen oxide is thermally grown in each of the contact openings. A blocking photoresist mask is then applied and patterned to expose the oxide in those openings in which a first set of contacts is to be formed. The screen oxide is removed and the first layer of metallization, typically platinum silicide, is then formed. The screen oxide is then removed from the protected contact areas and the second layer of metallization, for example, chrome, aluminum, or other metals or combinations thereof are deposited in all openings, thereby forming one layer of metallurgy in the second set of openings and two layers in the first set.

REFERENCES:
patent: 3904454 (1975-09-01), Magdo et al.
patent: 3995301 (1976-11-01), Magdo
patent: 4018627 (1977-04-01), Polata
Berger et al., "Masking Process for Base and Isolation Diffusion", IBM Tech. Dis. Bulletin, vol. 14, No. 5, Oct. 1971.
Barile et al., "Implanted Emitter Process for Semiconductor Transistor", _IBM Tech. Disclosure Bulletin, vol. 18, No. 7, Dec. 1975.

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