Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1997-09-03
1999-05-18
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
438737, 438740, 216 38, H01L21/00
Patent
active
059045698
ABSTRACT:
A process for forming a via in a semiconductor device using a self-aligned metal pillar to connect metal layers separated by a dielectric. A first aluminum layer is formed on an oxide layer overlying a semiconductor substrate, a titanium nitride layer is formed on the aluminum layer and finally a second aluminum layer is formed on the titanium nitride layer. In one continuous etching step, the stack of aluminum/titanium nitride/aluminum is then patterned and etched. A first dielectric is deposited overlying the exposed regions of the oxide layer and the formed metal stack. The wafer is then planarized exposing the top of the second aluminum layer. The wafer is again patterned and the second layer of aluminum is etched using the titanium nitride as an etch stop. A second dielectric is deposited to fill the resulting gaps and CMP processes are used to planarize the wafer and expose the top of the aluminum pillar. A third aluminum layer is formed on the overlying dielectric to make electrical contact to the exposed surface of the pillar.
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patent: 5451543 (1995-09-01), Woo et al.
patent: 5827768 (1998-10-01), Lin et al.
Conser Eugene
National Semiconductor Corporation
Powell William
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