Method for forming MOSFET devices

Details Method for forming MOSFET devices Method for forming MOSFET devices

1995-06-28

1996-02-27

Nguyen, Tuan H.

Fishing, trapping, and vermin destroying

437 48, 437 52, 437 57, 437 59, 437 34, 148DIG82, H01L 2170, H01L 218244

Patent

active

054948436

ABSTRACT:
A method for fabricating CMOS chips, using a SRAM cell composed of, both NFET and PFET devices, or only NFETs, as well as incorporating NFET and PFET peripheral devices, is described. This process features an NFET, used in the SRAM cell, where a lightly doped arsenic source and drain region is used to achieve maximum device performance, in terms of saturation current, as well as gate to diffusion overlap capacitance. However the NFET used for the peripheral device is fabricated using a lightly doped phosphorous source and drain region, to allow for more protection against the deleterious hot carrier injection phenomena.

REFERENCES:
patent: 4366613 (1983-01-01), Ogura et al.
patent: 5024960 (1991-06-01), Haken
patent: 5047358 (1991-09-01), Kosiak et al.
patent: 5158463 (1992-10-01), Kim et al.
patent: 5254487 (1993-10-01), Tamagawa
patent: 5324680 (1994-06-01), Lee et al.
patent: 5432114 (1995-07-01), O

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