Method for forming MOS transistors having vertical current flow

Details Method for forming MOS transistors having vertical current flow Method for forming MOS transistors having vertical current flow

1993-05-21

1995-01-17

Thomas, Tom

Fishing, trapping, and vermin destroying

437 27, 437913, 148DIG126, H01L 21265

Patent

active

053825381

ABSTRACT:
The process provides first for the accomplishment of low-doping body regions at the sides and under a gate region and then the accomplishment of high-doping body regions inside said low-doping body regions and self-aligned with said gate region. There is thus obtained an MOS power transistor with vertical current flow which has high-doping body regions self-aligned with said gate region and with a reduced junction depth.

REFERENCES:
patent: 4879254 (1989-11-01), Tsuzuki et al.
patent: 4920064 (1990-04-01), Whight
patent: 4960723 (1990-10-01), Davies
patent: 4970173 (1990-11-01), Robb
patent: 4987098 (1991-01-01), Nishiura et al.
patent: 5034336 (1991-07-01), Seki
patent: 5155052 (1992-10-01), Davies
patent: 5179032 (1993-01-01), Quigg

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