Method for forming isolation layer of semiconductor device

Details Method for forming isolation layer of semiconductor device Method for forming isolation layer of semiconductor device

2006-04-25

2006-04-25

Thai, Luan (Department: 2891)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S427000, C438S429000, C438S435000

Reexamination Certificate

active

07033907

ABSTRACT:
A method for forming an isolation layer of a semiconductor device is disclosed, which comprises the steps of: etching a silicon substrate having a cell region and a peripheral circuit region, forming a first trench having a first size in the cell region, and forming a second trench having a second size, which is larger than the first size of the first trench, in the peripheral circuit region; forming a sidewall oxide layer on surfaces of the first trench and the second trench; sequentially depositing a liner nitride layer and a liner oxide layer on a resultant substrate inclusive of the sidewall oxide layer; performing a plasma pre-heating process using O2+He with respect to the resultant substrate in an HDP CVD process chamber and selectively oxidizing a portion of the liner nitride layer remaining on a bottom of the second trench in the peripheral circuit region; continuously depositing an HDP oxide layer on the resultant substrate having been subjected to the plasma pre-heating process, thereby filling the trenches; and performing a chemical mechanical polishing process with respect to the HDP oxide layer.

REFERENCES:
patent: 6258692 (2001-07-01), Chu et al.
patent: 6486039 (2002-11-01), Yoo et al.
patent: 6607959 (2003-08-01), Lee et al.

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