Method for forming isolation layer and method for...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S431000, C438S700000, C438S795000, C257SE21546, C257SE21547

Reexamination Certificate

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07968423

ABSTRACT:
A method for fabricating a semiconductor device includes forming a hard mask pattern over a substrate, forming a protection layer by transforming a portion of a sidewall of the hard mask pattern, forming a trench by etching the substrate using the hard mask pattern and the protection layer as an etch barrier, forming an isolation layer by filling the trench with an insulation material, removing the hard mask pattern, and performing a cleaning process. By forming the protection layer, it is possible to prevent the isolation layer from being lost during the removing of the hard mask pattern and the cleaning process and thus prevent generation of a moat.

REFERENCES:
patent: 2002/0045324 (2002-04-01), Ding
patent: 2003/0186137 (2003-10-01), Chan
patent: 2007/0117346 (2007-05-01), Kwak
patent: 2008/0042283 (2008-02-01), Purushothaman et al.
patent: 1020050066368 (2005-06-01), None
Notice of Preliminary Rejection issued from Korean Intellectual Property Office on Dec. 16, 2010.

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