Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Reexamination Certificate
1998-12-30
2003-12-02
Kunemund, Robert (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
C438S750000, C438S751000, C438S754000
Reexamination Certificate
active
06656851
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is directed to a method for forming an isolation film in a semiconductor substrate which can isolate devices.
2. Description of the Background Art
As device densities increase dimensions decrease and device, it is more difficult to efficiently and reliably carry out an isolation process for isolating active devices. A trench process has been generally used as an isolation process for isolating the active devices on the grounds that it is sufficiently planarized, does not result in a have a bird's beak and prevents or minimizes a field thinning oxide effect as compared with a LOCOS process.
However, if an insulating material filling the trench is etched, the insulating material on peripheral edges of the trench is removed. As a result, there is formed a trench having a profile that which is not planarized is formed. The removal of materials on the peripheral edges causes current leakage between the active regions. This is called a ‘corner effect’.
FIGS. 1A-1H
are respective cross-sectional views illustrating a conventional method for forming an isolation film in a semiconductor device. As shown in
FIG. 1A
, a first insulation film
2
and a second insulation film
3
are sequentially formed on a semiconductor substrate
1
. Then, a photoresist film pattern
4
is formed on the second insulation film
3
. The first insulation film
2
and the second insulation film
3
are an oxide film and a nitride film, respectively.
As illustrated in
FIG. 1B
, an upper portion of the semiconductor substrate
1
is exposed by sequentially etching the second insulation film
3
and the first insulation film
2
using the photoresist film as a mask. This forms a trench on the upper portion of the semiconductor substrate
1
. Then, the photoresist film
4
is removed. As shown in
FIG. 1C
, a trench
5
is formed by etching the exposed semiconductor substrate
1
using the patterned second insulation film
3
as a hard mask.
As illustrated in
FIG. 1D
, a third insulation film
6
is formed on an inner surface of the trench
5
. The third insulation film
6
is an oxide film formed by the thermal oxidation method or the chemical vapor deposition method. The thickness of the third insulation film
6
is similar to that of the first insulation film
2
. As shown in
FIG. 1E
, a fourth insulation film
7
is formed on the semiconductor substrate
1
including the inside of the trench
5
. That is, the trench
5
is filled with the fourth insulation film
7
. The fourth insulation film
7
is composed of one of TEOS (tetra-ethyl orthosilicate), CVD-oxide, BPSG (boronphosphorous silicate glass), a combination of nitride and oxide, and oxidized polysilicon.
As illustrated in
FIG. 1F
, etch-back or chemical mechanical polishing is carried out on the fourth insulation film
7
until a surface of the second insulation film
3
is exposed.
As shown in
FIG. 1G
, the second insulation film
3
is then removed by a wet etching. In this phase, a portion of the fourth insulation film
7
protrudes above an upper surface of the semiconductor substrate
1
, and has vertical side portions. As illustrated in
FIG. 1H
, the first insulation film
2
is removed by dry etching or chemical mechanical polishing. During this etching process, however, side walls of the third and fourth insulation films
6
and
7
are etched leaving a gap between a portion of the sidewalls for the fourth insulation film
7
and the sidewalls for the trench
5
(see dotted circles in FIG.
1
H).
According to the conventional method for forming an isolation film as described above, a loss of insulating material occurs at the peripheral edges of the trench. In an attempt to lessen the insulating material loss, a thermal treatment is carried out after filling the trench. This lowers the etching ratio of the fourth insulation film
7
, but even so, does not prevent the insulating material loss.
The insulation profile of
FIG. 1H
has a disadvantage in that, when a word line is formed as a next process step, an electrode material is formed on the peripheral edges of the trench and an electric field concentrates there. This rapidly deteriorates a gate insulation film, and current leakage takes place.
SUMMARY OF THE INVENTION
One object of the present invention is to provide a method for forming an isolation film in a semiconductor substrate which prevents insulating material from being lost at the peripheral edges of the trench.
This and other objects are achieved by providing a method for forming an isolation film in a semiconductor device, comprising the steps of: providing a semiconductor substrate having at least a first insulation film formed thereon; forming a trench in the first insulation film and the semiconductor substrate; forming an insulation film pattern which fills the trench and extends from the trench over a portion of the first insulation film; and etching the first insulation film.
REFERENCES:
patent: 5433794 (1995-07-01), Fazan et al.
patent: 5480832 (1996-01-01), Miura et al.
patent: 5728621 (1998-03-01), Zheng et al.
patent: 5940716 (1999-08-01), Jin et al.
patent: 5989977 (1999-11-01), Wu
patent: 5998278 (1999-12-01), Yu
Birch & Stewart Kolasch & Birch, LLP
Hynix / Semiconductor Inc.
Kunemund Robert
Vinh Lan
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