Method for forming internal electrode pattern and method for...

Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates

Reexamination Certificate

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C438S458000, C438S464000, C438S759000, C257SE21088, C257SE21506, C257SE21519

Reexamination Certificate

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07605051

ABSTRACT:
A method for forming an internal electrode pattern having a predetermined shape includes the following: a step of forming a conductive layer by applying a metal paste on a first support, the metal paste containing metal powder and a binder; a step of forming a resin layer on a second support, the resin layer having a pattern negative to the internal electrode pattern; a step of compression bonding the first support and the second support to each other in such a manner that the conductive layer and the resin layer are opposite to each other; and a step of removing the second support from the first support so as to transfer a conductive layer to the second support, the conductive layer having the pattern negative to the internal electrode pattern, thereby forming the internal electrode pattern having the predetermined shape on the first support.

REFERENCES:
patent: 6074893 (2000-06-01), Nakata et al.
patent: 2005/0158895 (2005-07-01), Hayashi et al.
patent: 63-38285 (1988-02-01), None
patent: 02-058814 (1990-02-01), None
patent: 02-192707 (1990-07-01), None
patent: 06-061090 (1994-03-01), None
patent: 6-061090 (1994-03-01), None
patent: 7-79189 (1995-08-01), None
patent: 2004-111729 (2004-04-01), None
patent: 2002-0077588 (2002-10-01), None
Korean Office Action issued in Korean Patent Application No. KR 10-2007-7014868 dated Nov. 13, 2008.
Korean Office Action issued in Korean Patent Application No. KR 10-2007-7014868 dated Apr. 20, 2009.

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