Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating
Patent
1996-09-10
1998-04-14
Wojciechowicz, Edward
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
Insulating coating
257637, 257640, 257751, 257752, 257762, 257763, 257764, 257774, 257775, H01L 2358
Patent
active
057395799
ABSTRACT:
A method for forming interconnections for semiconductor fabrication and semiconductor devices have such interconnections are described. A first patterned dielectric layer is formed over a semiconductor substrate and has a first opening filed with conductive material. Another patterned dielectric layer is formed over the first dielectric layer and has a second opening over at least a portion of the conductive material. The first patterned dielectric layer may serve as an etch-stop in patterning the other patterned dielectric layer. Also, a dielectric etch-stop layer may be formed over the first patterned dielectric layer and over the conductive material before the other patterned dielectric layer has been formed. This dielectric etch-stop layer may serve as an etch-stop in patterning the other patterned dielectric layer. The second opening exposes a portion of the dielectric etch-stop layer. The exposed portion of the dielectric etch-stop layer is removed. The second opening is filled with conductive material.
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Chiang Chien
Fraser David B.
Intel Corporation
Wojciechowicz Edward
LandOfFree
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