Method for forming integrated circuits bearing polysilicon of re

Details Method for forming integrated circuits bearing polysilicon of re Method for forming integrated circuits bearing polysilicon of re

1982-12-06

1984-10-09

Weisstuch, Aaron

Metal treatment

Compositions

Heat treating

29576B, 219121L, H01L 2194, H01L 21428

Patent

active

044759550

ABSTRACT:
A method for fabricating polysilicon of reduced resistance that may be incorporated in silicon integrated chip manufacturing processes which comprises coating a wafer bearing dielectrically isolated islands with an isolating layer, and depositing thereover a layer of polysilicon. On the surface of the polysilicon layer, a masking layer is formed, and coated with a metallic reflective layer. The portion of the reflective layer, and, optionally, the masking layer, overlaying the interisland area is removed, and the wafer is then exposed to a laser beam, transforming the polysilicon layer into the appropriate resistor material. The remaining metallic and/or masking layer may then be removed, the device exposed to a laser beam again, thereby transforming the polysilicon across the entire surface.

REFERENCES:
patent: 4179310 (1979-12-01), Compton et al.
patent: 4198246 (1980-04-01), Uw
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patent: 4269631 (1981-05-01), Anantha et al.
patent: 4272880 (1981-06-01), Pashley
patent: 4292091 (1981-09-01), Togei
patent: 4299024 (1981-11-01), Piotrowski
patent: 4309224 (1982-01-01), Shibata
Komiya et al., "Pattern Laser Annealing by a Pulsed Laser", Jap. J. of App. Phys., vol. 20, No. 10, (Oct. 1981), pp. L749-L752.

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