Method for forming gate oxides of different thicknesses

Details Method for forming gate oxides of different thicknesses Method for forming gate oxides of different thicknesses

1999-05-06

2000-12-26

Bowers, Charles

Semiconductor device manufacturing: process

Utilizing varying dielectric thickness

438227, 438275, 438228, H01L 218238

Patent

active

061659185

ABSTRACT:
Systems and methods are described for fabricating semiconductor gate oxides of different thicknesses. Two methods for forming gate oxides of different thicknesses in conjunction with local oxidation of silicon (LOCOS) are disclosed. Similarly, two methods for forming gate oxides of different thicknesses in conjunction with shallow trench isolation (STI) are disclosed. Techniques that use two poly-silicon sub-layers of substantially equal thickness and techniques that use two poly-silicon sub-layers of substantially unequal thickness are described for both LOCOS and STI. The systems and methods provide advantages because gate uniformity and quality are improved, the processes and resulting devices are cleaner, and there is less degradation of carrier mobility.

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