Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2005-11-15
2005-11-15
Wilson, Christian (Department: 2891)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S424000, C438S435000
Reexamination Certificate
active
06964913
ABSTRACT:
The present invention is provided to form a floating gate of a flash memory device capable of restricting a thickness of a buffer oxide film to a thickness less than 50 Å to minimize increment in a thickness due to a wall oxidation process in the case of depositing the buffer oxide film prior to depositing the first polysilicon film and the pad nitride film, and reducing a thickness of the first polysilicon film with an HF dip time minimized in a pre-treatment cleaning process prior to depositing the second polysilicon film, and protecting the first polysilicon film from being attacked in a pad nitride film strip process, by removing at least 50% of the buffer oxide film in the pad nitride film strip process.
REFERENCES:
patent: 6326283 (2001-12-01), Liang et al.
patent: 6620681 (2003-09-01), Kim et al.
patent: 2002/0019113 (2002-02-01), Chung
patent: 2003/0203571 (2003-10-01), Rabkin et al.
Dong Cha Deok
Han Il Keoun
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
Wilson Christian
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