Method for forming emitters for field emission displays

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Reexamination Certificate

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C445S050000

Reexamination Certificate

active

06290562

ABSTRACT:

TECHNICAL FIELD
This invention relates to the production of field emission displays and more particularly to a method for forming emitters for field emission displays using image reversal lithography.
BACKGROUND OF THE INVENTION
Flat panel displays are widely used in a variety of applications, including computer displays. In addition to liquid crystal and plasma displays, one type of device well suited for such applications is a field emission display. Field emission displays typically include a generally planar substrate having an array of electron emitters. In many cases, the emitters are conical projections integral to the substrate.
FIG. 1
is a simplified side cross-sectional view of a portion of a field emission display
110
including a faceplate
120
and a baseplate
121
in accordance with the prior art.
FIG. 1
is not drawn to scale. The faceplate
120
includes a transparent viewing screen
122
, a transparent conductive layer
124
and a cathodoluminescent layer
126
. The transparent viewing screen
122
supports the layers
124
and
126
, acts as viewing surface and as a wall for a hermetically sealed package formed between the viewing screen
122
and the baseplate
121
. The viewing screen
122
may be formed from glass or other transparent material. The transparent conductive layer
124
may be formed, for example, from indium tin oxide. The cathodoluminescent layer
126
may be segmented into localized portions. In a conventional monochrome display
110
, each localized portion of the cathodoluminescent layer
126
forms one pixel of the monochrome display
110
. Also, in a conventional color display
110
, each localized portion of the cathodoluminescent layer
126
forms a green, red or blue sub-pixel of the color display
110
. Materials useful as cathodoluminescent materials in the cathodoluminescent layer
126
include Y
2
O
3
:Eu (red, phosphor P-56), Y
3
(Al,Ga)
5
O
12
:Tb (green, phosphor P-53) and Y
2
(SiO
5
):Ce (blue, phosphor P-47) available from Osram Sylvania of Towanda, PA or from Nichia of Japan.
The baseplate
121
includes emitters
130
formed on a planar surface of a substrate
132
that is preferably a semiconductor material such as silicon. The substrate
132
is coated with a dielectric layer
134
. In one embodiment, this is effected by deposition of silicon dioxide via a conventional TEOS process. The dielectric layer
134
is formed to have a thickness that is approximately equal to or just less than a height of the emitters
130
. This thickness is on the order of 0.4 microns, although greater or lesser thicknesses may be employed. A conductive extraction grid
138
is formed on the dielectric layer
134
. The extraction grid
138
may be formed, for example, as a thin layer of polysilicon. An opening
140
is created in the extraction grid
138
having a radius that is also approximately the separation of the extraction grid
138
from the tip of the emitter
130
. The radius of the opening
140
may be about 0.4 microns, although larger or smaller openings
140
may also be employed.
In operation, the extraction grid
138
is biased to a voltage on the order of 100 volts, although higher or lower voltages may be used, while the substrate
132
is maintained at a voltage of about zero volts. Signals coupled to the emitters
130
allow electrons to flow to the emitter
130
. Intense electrical fields between the emitter
130
and the extraction grid
138
cause emission of electrons from the emitter
130
.
A larger positive voltage, ranging up to as much as 5,000 volts or more but usually 2,500 volts or less, is applied to the faceplate
120
via the transparent conductive layer
124
. The electrons emitted from the emitter
130
are accelerated to the faceplate
120
by this voltage and strike the cathodoluminescent layer
126
. This causes light emission in selected areas, i.e., those areas opposite the emitters
130
, and forms luminous images such as text, pictures, and the like.
The brightness of the light produced in response to the emitted electrons depends, in part, upon the number of electrons striking the cathodoluminescent layer
126
in a given interval. Field emission microscopy of the emitters
130
reveal that electrons are emitted from only a few atomic sites at the tip of the emitters. The emitting area is very small, generally from 1-5 nm in diameter. Uniformity in the shape, height, and placement of the emitters
130
is an important factor in the quality of the field emission display
110
. These parameters affect differences in the number of electrons striking areas of the cathodoluminescent layer
126
that may be perceived by the viewer as bright and dark areas, or as other defects.
For instance, if an emitter
130
is shorter than other emitters, electrons emitted from the tip of the smaller emitter may have a tendency to spread out more as they are directed to the cathodoluminescent layer
126
. This could cause electrons to bleedover to areas of the cathodoluminescent layer
126
other than those intended, creating a picture defect. Similarly, emitters
130
that are longer than the others may have a tendency to not spread out as much as desired. Mis-located emitters
130
may tend to create a surplus of electrons in one area and a deficiency of electrons in others, also making a deficient picture.
Arrays of emitters
130
can be formed by chemical mechanical polishing steps such as those taught in U.S. Pat. No. 5,372,973, assigned to Micron Technology, Inc. and incorporated herein by reference. These arrays of emitters
130
can also be formed by typical semiconductor fabrication processes such as wet or dry etching of the silicon substrate
132
. One example of forming emitters
130
by semiconductor fabrication steps is seen in U.S. Pat. No. 5,766,829 assigned to Micron Technology, Inc. and incorporated herein by reference. In the '829 patent, printed features for defining the size and location of emitter sites are made using phase shift lithography. As seen in
FIG. 2
of the '829 patent, by using this method, the phase of exposure energy such as visible light or x-rays is controlled through a reticle in two orientations so that exposed and non-exposed regions or “islands” are produced on a photoresist by destructive or constructive interference. The islands are hardened and then used as etching masks. Isotropic or anisotropic etching is performed on the exposed substrate, while leaving the areas under the islands intact. Etching continues until the areas of the substrate under the islands form points; then the islands are removed. These points become the emitters of the flat panel display.
A problem in using phase shift lithography is that it is difficult to control the photoresist onto which the exposure energy is directed, causing the islands formed on the baseplate to be non-uniform. Later processing with nonuniform islands cause nonuniform emitters to be formed, and ultimately creates a substandard field emission display.
Other semiconductor fabrication technologies have been used to make arrays of emitters
130
. For instance, a negative photoresistive material layered on the substrate has been used. Using a negative photoresist to make an array of emitters
130
requires exposing the photoresist only where the islands are to be formed. The exposing energy directed to the negative photoresist hardens the exposed areas and later developing removes the nonexposed areas. This creates an array of islands of exposed photoresist for later processing into an array of emitters
130
. However, using a negative photoresist is disfavored for many reasons. It is extremely temperature sensitive, so that normal variations in processing temperatures create nonuniform islands. Some negative photoresist has a tendency to swell during developing, thus preventing its use in very small pattern making. It also has a limited depth of focus. Additionally, developing some negative photoresist requires organic solvents that are flammable as well as difficult and expensive to safely dispose.
A positive photor

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