Method for forming embedded diffusion layers using an alignment

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature

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438322, 438370, 438432, 438444, 438526, 438975, 148DIG102, H01L 2706

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058307990

ABSTRACT:
To form NPN and PNP transistors on the same base for example to obtain a complementary bipolar transistor it has been necessary to make an epitaxial layer a thick film, and this has resulted in deterioration of the characteristics of the NPN transistor. Also, because a step of forming an alignment mark has been necessary this has increased the number of manufacturing steps needed to make a complementary bipolar transistor. This invention provides a semiconductor device manufacturing method which solves this problem as follows: After a first opening 13 (alignment mark 16) and a second opening 14 are formed in an insulating film 12 formed on a semiconductor base 11 and a doping mask 15 is then formed on the semiconductor base 11, a third opening 17 is formed thereon with the alignment mark 16 as a reference. After an impurity 18 is introduced into the semiconductor base 11 through the third opening 17, the doping mask 15 is removed and after that an impurity 19 is introduced into the semiconductor base 11 by solid-phase diffusion through the second opening 14 and a first embedded diffusion layer 20 is thereby formed and at the same time the impurity 18 is caused to diffuse and form a second embedded diffusion layer 21. Then, after an epitaxial layer is formed, an impurity diffusion layer is formed therein by ion injection (not shown).

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patent: 5503962 (1996-04-01), Caldwell

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