Method for forming electrical contacts in a semiconductor device

Details Method for forming electrical contacts in a semiconductor device Method for forming electrical contacts in a semiconductor device

1994-11-02

1996-03-26

Thomas, Tom

Fishing, trapping, and vermin destroying

437228, 437981, 437978, 437197, 148DIG161, H01L 2144

Patent

active

055020062

ABSTRACT:
When taper portions of contact holes are etched to form wiring conductors in a semiconductor device, a hydrophobic insulating film having methyl groups on its surface is formed on a SiO.sub.2 film in the low pressure CVD process, using mixed gas of tetraethyl orthosilicate TEOS and ozone O.sub.3. Since the hydrophobic insulating film adheres well to a resist film, etching solution seldom soaks into between the hydrophobic insulating film and the resist film, thus wet etching is performed in the insulating film to obtain satisfactory taper portions of the contact holes.

REFERENCES:
patent: 4372034 (1983-02-01), Bohr
patent: 4924800 (1990-05-01), Tanaka
patent: 5132774 (1992-07-01), Matsuura et al.
patent: 5219791 (1993-06-01), Freiberger
patent: 5219792 (1993-06-01), Kim et al.
patent: 5266525 (1993-11-01), Morozumi
Mehta et al., "A Single-Pass, In-Situ Planarization Process Utilizing TEOS for Double-Poly, Double-Metal CMOS Technologies" 1989 Proceedings Sixth International IEEE VLSI Multilevel Interconnection Conference, Jun. 1989, pp. 80-88.

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