Method for forming DRAM stacked capacitor

Details Method for forming DRAM stacked capacitor Method for forming DRAM stacked capacitor

1997-05-05

1999-08-24

Trinh, Michael

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

438253, 438254, 438397, 438735, 438737, 438738, H01L 2120

Patent

active

059435828

ABSTRACT:
The present invention discloses a method for forming DRAM stacked capacitors by utilizing a densified oxide layer as an etch-stop for the wet etching process of an upper oxide layer in forming a contact hole for the stacked capacitor and thus, eliminating the need of a silicon nitride etch-stop layer and the occurrence of numerous processing difficulties normally observed in such stacked capacitor forming process. The lower oxide layer can be formed by a BPTEOS chemistry while the upper oxide layer can be formed by an ozone-TEOS chemistry.

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patent: 5273925 (1993-12-01), Yamanaka
patent: 5403767 (1995-04-01), Kim
patent: 5543346 (1996-08-01), Keum et al.
patent: 5627094 (1997-05-01), Chan et al.
patent: 5716884 (1998-02-01), Hsue et al.
patent: 5736450 (1998-04-01), Huang et al.

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