Fishing – trapping – and vermin destroying
Patent
1989-11-30
1991-09-17
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 33, 437 90, H01L 2176
Patent
active
050495216
ABSTRACT:
A method for forming a dielectrically isolated semiconductor devices on a semiconductor substrate. An epitaxial layer is grown on a wafer having a thin buried oxide layer. Trench regions are etched through the epitaxial layer to the underlying oxide layer. A dielectric isolation layer is formed on the sidewalls of the trench regions so as to isolate an active region of the epitaxial semiconductor material. The trenches are etched to the underlying semiconductor substrate and the semiconductor material is selectively epitaxially regrown in the trench regions. Semiconductor devices are formed in the isolated active regions. Contacts are made to the active regions of the semiconductor device and to the wafer substrate through the epitaxially regrown trench regions.
REFERENCES:
patent: 3508980 (1970-04-01), Jackson et al.
patent: 3575740 (1971-04-01), Casirucci et al.
patent: 3966577 (1976-06-01), Hochberg
patent: 4234362 (1980-11-01), Riseman
patent: 4256514 (1981-03-01), Pogge
patent: 4473598 (1984-09-01), Ephrath et al.
patent: 4507158 (1985-03-01), Kamins et al.
patent: 4509249 (1985-04-01), Goto et al.
patent: 4530149 (1985-07-01), Jarstrebski et al.
patent: 4543706 (1985-10-01), Bencuya et al.
patent: 4554728 (1985-11-01), Shepard
patent: 4589193 (1986-05-01), Goth et al.
patent: 4725562 (1988-02-01), El-Kareh et al.
patent: 4771328 (1988-09-01), Malaviya et al.
patent: 4786960 (1988-11-01), Jeuch
patent: 4810667 (1989-03-01), Zorinsky et al.
patent: 4819052 (1989-04-01), Hutter
patent: 4820654 (1989-04-01), Lee
patent: 4824795 (1989-04-01), Blanchard
patent: 4825277 (1989-04-01), Mattox et al.
patent: 4900692 (1990-02-01), Robinson
patent: 4908328 (1990-03-01), Hu et al.
Belanger Richard H.
Kim Sang S.
Chaudhuri Olik
Fourson G.
Silicon General, Inc.
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