Method for forming dielectric isolation in integrated circuits

Details Method for forming dielectric isolation in integrated circuits Method for forming dielectric isolation in integrated circuits

1975-05-30

1976-08-03

Rutledge, L. Dewayne

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

29578, 29580, 148174, 148187, 357 40, 357 50, 357 59, H01L 2176, H01L 2704, H01L 2122

Patent

active

039727548

ABSTRACT:
In the fabrication of integrated circuits, a method is provided for forming dielectrically isolated regions in the silicon substrate comprising selectively etching recesses in a silicon substrate and thermally oxidizing the recessed portions of the silicon substrate to form regions of recessed silicon dioxide extending into the substrate. Then, a blanket introduction of impurities of opposite-type conductivity is made into the portions of the substrate remaining unoxidized, after which a layer of silicon of said opposite-type conductivity is epitaxially deposited on the substrate surface. Next, utilizing appropriate silicon nitride masking, recesses are etched into the silicon epitaxial layer in registration with the now buried regions of recessed silicon dioxide in the substrate. Then, the recessed portions of the silicon epitaxial layer are thermally oxidized to the extent sufficient to form regions of recessed silicon dioxide extending through said epitaxial layer into registered contact respectively with the regions of recessed silicon dioxide formed in the substrate.

REFERENCES:
patent: 3379584 (1968-04-01), Bean et al.
patent: 3386865 (1968-06-01), Doo
patent: 3481801 (1969-12-01), Hugel
patent: 3648125 (1972-03-01), Peltzer
patent: 3796613 (1974-03-01), Magdo et al.
patent: 3861968 (1975-01-01), Magdo et al.

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