Fishing – trapping – and vermin destroying
Patent
1988-04-19
1989-01-24
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437192, 437200, 437203, 437228, 437195, 437238, 357 71, H01L 21283
Patent
active
048001767
ABSTRACT:
A method of manufacturing semiconductor devices according to the present invention includes the steps of forming an element isolation region on the main surface of a semiconductor substrate of a first conductivity type, forming a high impurity concentration layer of a second conductivity type in the surface area of a portion of the semiconductor substrate defined by the element isolation region, and forming a first insulation film on the entire surface of the resultant semiconductor structure. Thereafter, a contact hole is formed in the first insulation film which is formed on the high impurity concentration layer, a semiconductor layer containing an impurity of the same conductivity type as the high impurity concentration layer is formed on the first insulation film, and a second insulation film is formed on the semiconductor layer. After this, a planarization film is formed on the entire surface of the second insulation film and is then selectively removed by anisotropic etching, to leave part of the planarization film filling the contact hole. Then, the portion of the planarization film exposed by the anisotropic etching is removed, a metal layer is formed on the entire surface of the resultant semiconductor structure, and the metal layer and semiconductor layer are patterned to form a laminated structure of a wiring layer.
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Maeda et al., "Highly Reliable One-Micron-Rule Interconnection Utilizing TiN Barrier Metal," IEDM, pp. 610-613, 1985.
Gardner et al., "Layered and Homogeneous Films of Aluminum and Aluminum/Silicon with Titanium and Tungsten for Multilevel Interconnects," IEEE Transactions on Electron Devices, vol. ED-32, No. 2, pp. 174`4 183, Feb. 1985.
Asami Tetsuya
Kakumu Masakazu
Hearn Brian E.
Kabushiki Kaisha Toshiba
Quach T. N.
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