Method for forming capped copper electrical interconnects

Details Method for forming capped copper electrical interconnects Method for forming capped copper electrical interconnects

1995-05-12

1996-08-27

Niebling, John

Electrolysis: processes, compositions used therein, and methods

Electrolytic coating

Coating selected area

205118, 205122, 205162, 205178, 205224, 205917, 437189, 437208, 4274431, C25D 502, H01L 21288

Patent

active

055498086

ABSTRACT:
The present invention relates generally to a new structure and method for capped copper electrical interconnects. More particularly, the invention encompasses a novel structure in which one or more of the copper electrical interconnects within a semiconductor substrate are capped to obtain a robust electrical interconnect structure. A method for obtaining such capped copper electrical interconnect structure is also disclosed. These capped interconnects can be a single layer or multi-layer structures. Similarly, the interconnect structure that is being capped can itself be composed of single or multi-layered material.

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"Alternative Ceramic Plate-Up Process", IBM Tech. Disc. Bulletin, vol. 32, No. 10A, Mar. 1990, p. 442.
Messner et al., Thin Film Multichip Modules, ISBN 0-930815-33-5, 1992 by International Society for Hybrid Microelectronics.

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