Method for forming bottle trenches

Semiconductor device manufacturing: process – Chemical etching – Altering etchability of substrate region by compositional or...

Reexamination Certificate

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Details

C438S243000, C438S424000, C438S704000, C438S734000, C438S701000, C438S702000, C438S386000

Reexamination Certificate

active

06716757

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for forming deep trenches for dynamic random access memory (DRAM). In particular, the invention involves the formation of bottle trenches for DRAMs.
2. Description of the Related Art
Generally speaking, capacitors widely used in dynamic random access memory (DRAM) are formed by two conductive layers (electrode plate) having an insulation layer between. The ability to store electric charges of a capacitor depends on the thickness of the insulation layer, surface area of the electrode plate and the electrical characteristics of the insulating material. In recent developments to reduce size of semiconductor elements to enhance integration density, memory cell area must be continuously reduced to hold a large number of memory cells, thereby increasing density. Meanwhile, the electrode plates of a capacitor in a memory cell must present sufficient surface area to store enough electric charge.
Nevertheless, where element size is continuously reducing, trench storage node capacitance of DRAM is decreased as well. As a result, storage capacitance must be increased to maintain good operating performance for memory.
Currently, the method for increasing storage capacitance for DRAMs increases the width of the bottom of the trench, thereby increasing surface area to form a bottle-shaped capacitor. The above method is carried out by selective oxidation of the upper portion of a trench to form a collar oxide layer to protect the upper portion of the trench. Next, the lower portion of the trench is wet-etched to form a bottle-shaped trench having a greater radius than the upper portion of the trench.
In a conventional process, a trench
16
is formed by anisotropic dry etching a substrate having a pad stack layer formed thereon, as shown in FIG.
1
. The pad stack layer includes an oxide layer
12
and a nitride layer
14
. However, there are often problems of lattice interface associated with <100> and <110> in the trench when adopting the above method. A trench having a sharply defined corners, denoted by number
18
in
FIG. 1
is thus formed because etching is performed along the lattice interface. A trench having a sharp end as shown in
FIG. 1
easily produces local strong electric field, thereby causing leakage. This shortcoming is not advantageous for DRAM capacitors. And it is unfavorable for follow-up process, as the implementation of process is more difficult.
SUMMARY OF THE INVENTION
In order to overcome the above problems, an object of the invention is to provide a method for forming bottle trenches, which involves amorphization of the sidewalls and bottom of the trench so that the lattice structure is broken up, followed by oxidation of the amorphous sidewalls and bottom of the trench to enlarge the lower portion of the trench to form a bottle trench. Another embodiment further comprises removing the oxidized part to form a bottle trench.
In order to achieve the above objects, there is provided a method for forming bottle trenches, comprising providing a substrate formed with a pad stack layer on the top, and a deep trench with a protective layer on the upper portions of sidewalls thereof, implanting ions into the lower portions of sidewalls and bottom of the trench not covered by the protective layer to amorphize the atomic structure of the sidewalls and bottom, oxidizing the amorphous sidewalls and bottom of the trench to form a bottle-shaped oxide layer thereon, and removing the bottle-shaped oxide layer.
According to another embodiment of the invention, the method for forming bottle trenches comprises providing a semiconductor substrate having an active region, forming a first pad oxide layer and a first pad nitride layer sequentially on the substrate to form a pad stack layer, defining the pad stack layer and the substrate to form a trench in the active region, forming a protective layer on the upper portion of the sidewalls of the trench, implanting ions into the lower portions of sidewalls and bottom of the trench not covered by the protective layer to amorphize the atomic structure of the sidewalls and bottom, and removing the amorphous sidewalls and bottom of the trench.
In the method of the present invention, the protective layer is preferably insulating material, such as silicon oxide, or silicon nitride. Ions for ion implantation are preferably Si, Ge or Ar, Ne, He of inert gas. Dosage is preferably 1e14~1e18 atom/cm
2
. Other ions, such as P+ or As+ are applicable as well. Oxidation is preferably carried out by dry oxidation, wet oxidation, rapid thermal nitridation (RTN) or liquid phase oxidation. The step removing amorphous sidewalls and bottom of the trench by acid is performed by NH
4
OH, HF/EG, diluted hydrogen fluoride (DHF) or buffered hydrogen fluoride(BHF).
According to the method of the present invention, lower portion of the sidewalls and bottom of the trench after ion implantation are removed by acid or oxidation. The bottom of the trench is rounded, not sharply defined. Consequently, the surface of the bottle trench is increased. At the same time, the etching rate is twice that when acid or NH
4
OH is used to remove amorphous sidewalls and bottom of the trench. This greatly reduces the time of the removal step, thus production yield is increased. Without ion implantation, a sharply defined corners are formed at the bottom of the trench. Under these circumstances, etching the single silicon sidewalls with acid causes higher etching rate in the <111> and <110> direction. Thus, a trench with sharply defined corners is inevitably formed.
The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings, given by way of illustration only and thus not intended to be limitative of the present invention.


REFERENCES:
patent: 5629226 (1997-05-01), Ohtsuki
patent: 5658816 (1997-08-01), Rajeevakumar
patent: 5692281 (1997-12-01), Rajeevakumar
patent: 6232171 (2001-05-01), Mei
patent: 6313008 (2001-11-01), Leung et al.

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