Method for forming blanket planarization of the multilevel inter

Details Method for forming blanket planarization of the multilevel inter Method for forming blanket planarization of the multilevel inter

1996-11-20

1997-11-25

Bowers, Jr., Charles L.

Fishing, trapping, and vermin destroying

437192, 437190, 437198, H01L 2144

Patent

active

056912404

ABSTRACT:
An improved process for forming blanket planarization of the multilevel interconnection of a semiconductor substrate by LPD-SiO.sub.2 (Liquid-Phase Deposition) selective deposition technique which LPD-SiO.sub.2 is not deposited on silicon nitride, and forming silicon dioxide to achieve blanket planarization of multilevel interconnection.

REFERENCES:
patent: 5270233 (1993-12-01), Hamatake
patent: 5286664 (1994-02-01), Horiuchi
patent: 5472898 (1995-12-01), Hong et al.
patent: 5529946 (1996-06-01), Hong
patent: 5561076 (1996-10-01), Yoshino

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