Metal working – Method of mechanical manufacture – Assembling or joining
Patent
1982-03-22
1984-09-04
Hearn, Brain E.
Metal working
Method of mechanical manufacture
Assembling or joining
29576W, 29580, 148188, 357 59, H01L 2174, H01L 2176
Patent
active
044688563
ABSTRACT:
In semiconductor devices, the transistors are isolated by means of either a PN junction isolation method or a passive isolation (PI) method. The present invention aims to improve the PI method, which is disadvantageous in that an electrode, electrically connected to the semiconductor substrate, causes a decrease in the integration density of the IC chip. In the present invention, the vacant space outside the element-forming regions is used to form the electrode and the integration density is not decreased due to the formation of the electrode. Since a polycrystalline silicon layer is in a groove formed in the vacant space, ohmic contact between the polycrystalline semiconductor material in the layer and the semiconductor substrate can be achieved while at the same time keeping the diffusion length of the impurities diffused from the polycrystalline silicon layer and the semiconductor substrate, very short. Therefore, upward diffusion of the impurities from the N.sup.+ -type buried layer can be effectively suppressed to realize a high breakdown voltage of the semiconductor devices.
REFERENCES:
patent: 3752715 (1973-08-01), Antipov et al.
Fujitsu Limited
Hearn Brain E.
Schiavelli Alan E.
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