Method for forming a tungsten upper electrode of a capacitor

Details Method for forming a tungsten upper electrode of a capacitor Method for forming a tungsten upper electrode of a capacitor

1999-06-28

2001-02-20

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

C438S253000, C438S243000, C438S683000, C438S685000, C438S768000

Reexamination Certificate

active

06190994

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device; and, more particularly, to a method for forming a tungsten upper electrode of a capacitor.
DESCRIPTION OF THE PRIOR ART
Recently, a Ta
2
O
5
film is expected to be dielectric material instead of a NO film or ONO film, since it has a high dielectric constant, a good thermal chemical stability and a good step coverage in chemical vapor deposition(CVD). However, the Ta
2
O
5
film reacts with a polysilicon layer so that a SiO
2
film is formed at the interlayer of the Ta
2
O
5
film and the polysilicon layer. Therefor, when a Ta
2
O
5
film is used as a dielectric layer, it is difficult to use polysilicon as an upper and a lower electrodes of a capacitor due to increasing of leakage current.
Accordingly, after a lower electrode is made of a polysilicon layer, a thermal process is performed in a nitrogen containing ambient, whereby the surface of a lower electrode is nitrated. It is considered that material being stable at the location between a Ta
2
O
5
film and a polysilicon layer and having good electric characteristic is used as an upper electrode. For example, it is disclosed that an upper electrode is formed from a TiN film by a chemical vapor deposition(CVD) method, but, in the method, dielectric characteristic of a Ta
2
O
5
film is decreased due to interlayer reaction of a TiN film and a Ta
2
O
5
film. Also, in case of using Pt and RuO
2
, since they have excellent chemical stability, it is difficult to perform an etching and is poor at step coverage while characteristic of an interlayer is good.
Since a tungsten film which is deposited by CVD method has low resistivity, such as 10 &mgr;&OHgr;cm, a good step coverage and a good etching characteristic, it scarcely reacts with an oxide layer thermodynamically, and it is easily etched by a reactive ion etching. Accordingly, a tungsten film is suitable to be an upper electrode of a Ta
2
O
5
film. However, when tungsten is deposited, a Ta
2
O
5
film is damaged by deposition materials, such as WF
6
, and in the following process, it reacts with polysilicon to form tungsten silicide.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method for forming a capacitor to prevent a dielectric layer from being damaged during the formation of a tungsten film on the dielectric layer, and preventing tungsten silicide from being formed on a tungsten film in the following process.
In accordance with one aspect of the present invention, there is provided a method for forming a capacitor of a semiconductor device, the method comprising the steps of: forming a first polysilicon layer on a semiconductor substrate; forming a Ta
2
O
5
layer on the first polysilicon layer; forming a second polysilicon layer on the Ta
2
O
5
layer; forming a tungsten seed layer on the Ta
2
O
5
layer by reducing WF6 with the second polysilicon layer; and forming a tungsten layer on the tungsten seed layer.
In the present invention, for protecting a dielectric layer, a polysilicon layer is formed on the dielectric layer as a sacrificial layer. Then, a tungsten seed layer is formed on the dielectric layer by reducing WF6 with the polysilicon layer. After that, a tungsten film is formed by subsequently carrying out a deposition process using the reaction of WF
6
and H
2
or SiH
4
Then, a thermal process is performed in ammonia(NH
3
) containing ambient, or a plasma process using a nitrogen gas or an ammonia gas is performed to nitride the surface of a tungsten film for preventing a tungsten silicide film from being formed in the following processes.


REFERENCES:
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patent: 5956594 (1999-09-01), Yang et al.
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patent: 5966612 (1999-10-01), Wu
patent: 10032248 (1998-02-01), None
patent: 10209280 (1998-08-01), None

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