Method for forming a transistor having silicided regions

Details Method for forming a transistor having silicided regions Method for forming a transistor having silicided regions

1992-12-16

1994-10-04

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 41, 437 44, H01L 21283

Patent

active

053526317

ABSTRACT:
A process for forming a transistor (10) begins by providing a substrate (12). Field oxide regions (14) or equivalent isolation is formed overlying or within the substrate (12). A gate oxide (16) and a conductive layer (18) are formed. A masking layer (20) is formed overlying the conductive layer (18). The masking layer (20) and the conductive layer (18) are etched to form a gate electrode and define a drain region (19) and a source region (21). Spacers (22) are formed adjacent the gate electrode. First silicided regions (26) are formed over the source and drain regions (21 and 19 respectively). The masking layer prevents the gate electrode from siliciding. The masking layer (20) is removed and a second silicided region (30) is formed overlying the gate electrode. The second silicided region (30) and the silicided regions (26) are made of different silicides.

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