Method for forming a stacked semiconductor structure

Details Method for forming a stacked semiconductor structure Method for forming a stacked semiconductor structure

1992-04-01

1993-05-25

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 52, 437 59, 437913, 437915, 148DIG53, 148DIG109, H01L 21265

Patent

active

052139905

ABSTRACT:
A method for connecting different conducting layers of a microelectronic device is disclosed. The method comprises: providing a first conducting layer (40); forming a first insulating layer (42) over said first conducting layer (40); forming a second conducting layer over said first insulating layer (42); patterning said second conducting layer to form a conducting element (44) over said first insulating layer (42) whereby the top surface of said first insulating layer (42) is protected from deleterious effects of further process steps; forming a second insulating layer (46) over said conducting element (44) and said first insulating layer (42) selectively removing said first insulating layer (42) and said second insulating layer (46), using an etch process which is selective over said insulating layers (42, 46) said conducting element (44) and said first conducting layer (40), to form a contact region (48) which straddles an edge of said conducting element (44) such that a portion of said conducting element (44) is exposed adjacent to an exposed portion of said conducting layer (40) with said first insulating layer (42) vertically interposed; and forming a third conducting layer (50) within said contact area (48). Other methods are also disclosed.

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