Method for forming a SiGe heterojunction bipolar transistor...

Details Method for forming a SiGe heterojunction bipolar transistor... Method for forming a SiGe heterojunction bipolar transistor...

2005-03-01

2005-03-01

Tsai, H. Jey (Department: 2812)

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

C438S312000

Reexamination Certificate

active

06861323

ABSTRACT:
A method for forming a heterojunction bipolar transistor includes forming an epitaxial layer, forming a first polysilicon layer, and forming a dielectric layer on the first polysilicon layer. The first polysilicon layer and the dielectric layer include an opening for exposing a portion of the top surface of the epitaxial layer. Then, a silicon germanium layer is selectively grown in the opening. The silicon germanium layer is grown on the exposed top surface of the epitaxial layer and on the exposed sidewall of the first polysilicon layer. Next, a spacer is formed along the sidewalls of the dielectric layer and the silicon germanium layer. A second polysilicon layer in electrical contact with the silicon germanium layer is then formed. Accordingly, a low resistance connection between the first polysilicon layer forming the extrinsic base region and the silicon germanium layer forming the intrinsic base region of the transistor is formed.

REFERENCES:
patent: 5024957 (1991-06-01), Harame et al.
patent: 5897359 (1999-04-01), Cho et al.
patent: 6437376 (2002-08-01), Ozkan
patent: 6680522 (2004-01-01), Sato
patent: 20030042504 (2003-03-01), Azam et al.

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