Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1999-03-29
2000-03-07
Dang, Trung
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438437, 438978, 148DIG50, H01L 2176
Patent
active
060339683
ABSTRACT:
A method for forming a shallow trench isolation structure. A mask layer having an opening is formed over a substrate to pattern a shallow trench. A sloped spacer is formed on the sidewalls of the opening. The mask layer and the spacer are used as a hard mask, and a portion of the substrate is removed by anisotropic etching to form a shallow trench isolation structure. The sloped sidewalls of the shallow trench isolation structure and the substrate surface intersect at an obtuse angle. Therefore, the structure prevents stress and avoids leakage current.
REFERENCES:
patent: 5696019 (1997-12-01), Chang
patent: 5920786 (1999-07-01), Pham et al.
patent: 5933749 (1999-08-01), Lee
patent: 5945352 (1999-08-01), Chen et al.
patent: 5953621 (1999-09-01), Gonzalez et al.
Dang Trung
United Integrated Circuits Corp.
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