Method for forming a semiconductor structure with self-aligned c

Details Method for forming a semiconductor structure with self-aligned c Method for forming a semiconductor structure with self-aligned c

1995-06-07

1996-12-31

Nguyen, Tuan H.

Fishing, trapping, and vermin destroying

437 34, 437 49, 437 51, 437 40, 437 41, 437192, 437193, 437200, H01L 2170

Patent

active

055894151

ABSTRACT:
Local interconnect structures and processes using dual-doped polysilicon. A single implant dopes part of the polysilicon local interconnect layer p-type, and also diffuses through the polysilicon interconnect layer to enhance the doping of the PMOS drain regions, and also (optionally) adds to the doping of the PMOS source regions to provide source/drain asymmetry. The polysilicon interconnect layer is clad to reduce its conductivity, optionally with patterned rather than global cladding so that the diode can be used as a load element if desired.

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