Semiconductor device manufacturing: process – Making passive device – Planar capacitor
Reexamination Certificate
1999-07-12
2001-05-22
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making passive device
Planar capacitor
C438S253000, C438S254000, C438S396000, C438S397000
Reexamination Certificate
active
06235603
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to a method for forming a semiconductor device, and more particularly, to a method for forming a semiconductor device having an electrode.
BACKGROUND OF THE INVENTION
The scaling of semiconductor devices, such as capacitors in dynamic random access memories (DRAMs), has resulted in the integration of new materials into the fabrication of these devices. Among them include high dielectric constant (high-k) materials, such as barium strontium titanium oxide (BST) and the like. However, many high-k dielectric materials may be incompatible with conventional capacitor electrode materials because they can require high temperature depositions or high-temperature anneals in the presence of oxygen during their formation. The high temperature and exposure to oxygen can oxidize portions of the electrode and undesirably change the electrical properties of the capacitor.
To reduce this problem, alternative materials are being investigated as replacements for conventional electrode materials. Among them include oxidation-resistant conductive materials and conductive materials that form conductive oxides, such as ruthenium, platinum, iridium, palladium, and the like. However, current processes and chemistries used to form electrodes from these materials can be problematic. For example, ruthenium is easily etched in an oxygen-containing plasma, however, its etch by-products can be toxic. Additionally, halogens, which are commonly used to etch conductive materials, produce low volatility etch by-products that make etching materials such as platinum, palladium, and iridium difficult. This difficulty increases as the thickness of the material being etched increases and the spacing between etched features decreases.
Using high-powered etching conditions or alternative processes, such as ion milling to etch the thicker material, results in reduced selectivity to underlying films. This can produce trenching of the underlying material and the re-deposition of the material on sidewalls of the feature being etched. Trenching of underlying films is undesirable because it can impact device performance. The re-deposition of the underlying material on etched feature sidewalls can present reliability concerns. The removal of sidewall deposited material is difficult and is accomplished at the expense of additional processing and time.
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Jones Robert Edwin
Melnick Bradley M.
Oi Hideo
White, Jr. Bruce E.
Motorola Inc.
Nguyen Ha Tran
Niebling John F.
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