Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates
Reexamination Certificate
2000-09-14
2004-09-28
Lee, Eddie (Department: 2811)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
C438S456000, C438S457000, C438S458000, C438S459000, C438S622000
Reexamination Certificate
active
06797591
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor device, and a method for forming the semiconductor device. In particular, the invention relates to a method for forming a multi-layer semiconductor device in which at least two of the layers are bonded by an annealing bonding process.
BACKGROUND OF THE INVENTION
As miniaturisation requirements in the semiconductor industry grow, the demand for semiconductor devices with increasing numbers of features similarity grows. In the field of laser and sensor technology semiconductor devices which include micro-electro-mechanical components and micro-opto-electro-mechanical components are commonly required. Such devices are typically multi-layer devices which include multiple layers of semiconductor material and/or other suitable materials. The micro-components are typically formed in one of the semiconductor layers, while circuitry is formed in the other layers, and may also be formed on the micro-component layer. The circuitry may be provided for controlling the micro-components and may also be provided for other functions. In certain cases some or all of the circuitry for controlling the micro-components may be provided on a separate discrete semiconductor device. In general, it is desirable, and indeed in many cases it is a requirement that the respective semiconductor layers should be electrically insulated, one from the other. This requires the formation of insulating layers between the respective semiconductor layers. Such insulating layers, are typically provided by oxide layers, which may be grown or deposited. Because of the number of semiconductor layers, in general, it is necessary to bond some of the layers together by suitable bonding processes, typically, high temperature annealing processes. Typically, a semiconductor layer is bonded to an oxide layer which had been grown or deposited on another semiconductor layer. The surface of the semiconductor layer to be bonded to the oxide layer, in general, is ground and polished to a high degree of smoothness for providing a smooth surface for abutting the oxide layer on the other semiconductor layer. The oxide layer, in general, provides a relatively smooth surface for bonding to the semiconductor layer, however, being an oxide layer some flow of the oxide layer is accommodated during the annealing process in order to achieve a good bond between the respective surfaces.
In general, micro components, in particular, micro-electro-mechanical components and micro-opto-electro-mechanical components are high precision components, and in general, are relatively fragile, and are vulnerable to damage, in particular, distortion and the like if subjected to hostile environments. In particular, such micro-components are vulnerable to damage resulting from high temperature annealing processes. It is therefore desirable that the formation of such micro-components should be one of the last, and preferably, the last set of operation in the formation of the multi-layer semiconductor device. However, in many instances this is not possible, since it is required in many cases that the micro-components be formed in an intermediate layer between others of the semiconductor layers. In such cases, it is necessary that the micro-components to be formed prior to bonding of one of the intermediate layer to an adjacent layer or layers. In such cases, the micro-components are subjected to the high temperatures of the annealing process for bonding the intermediate layer within which the micro-components have already been formed to the adjacent layer. This is undesirable.
There is therefore a need for a method for forming a multi-layer semiconductor device which overcomes these problems.
The present invention is directed towards providing such a method, and a semiconductor device formed according to the method.
SUMMARY OF THE INVENTION
According to the invention there is provided a method for forming a semiconductor device comprising first, second and third layers, with a component being formed in the second layer, and first and second etch stop layers being located between the first and second layers, and the second and third layers, respectively, and at least the second etch stop layer being bonded to one of the second and third layers, the method comprising the steps of:
prior to bonding the one of the second and third layers to the second etch stop layer, patterning the second etch stop layer to define the component in the second layer for facilitating etching of the second layer through the third layer,
bonding the one of the second and third layers to the second etch stop layer, and
etching the second layer through the third layer and the second etch stop layer for forming the component in the second layer.
In one embodiment of the invention a portion of the third layer adjacent the component is etched for exposing the component. Preferably, the second layer is etched sequentially after the portion of the third layer adjacent the component has been etched in the same etching process.
Advantageously, the portion of the third layer adjacent the component which is etched for exposing the component is etched to the second etch stop layer. Ideally, the second layer is etched to the first etch stop layer for forming the component.
In one embodiment of the invention a portion of the second etch stop layer adjacent the component and which is exposed by the etched portion of the third layer is etched through the etched portion of the third layer for exposing the component. Advantageously, a portion of the first etch stop layer adjacent the component is etched for forming a void between the component and the first layer after the component has been formed.
In one embodiment of the invention a communicating bore is formed through the first layer communicating with the first etch stop layer for facilitating etching of the portion of the first etch stop layer adjacent the component for forming the void between the component and the first layer. Preferably, prior to etching the second layer for forming the component initially only a part of the portion of the first etch stop layer is etched through the communicating bore in the first layer for thinning the first etch stop layer for minimising stresses induced in the portion of the second layer from which the component is to be formed.
In another embodiment of the invention the first etch stop layer is bonded to one of the first and second layers, and is bonded to the one of the first and second layers prior to the second etch stop layer being bonded to the one of the second and third layers. Preferably, the second etch stop layer is formed on the second layer after bonding of the first etch stop to the respective one of the first and second layers.
In one embodiment of the invention the first and second etch stop layers are grown layers.
Preferably, the second etch stop layer is grown on the second layer, and the second etch stop layer is bonded to the third layer. Advantageously, the first etch stop layer is grown on the first layer, and the first etch stop layer is bonded to the second layer. Ideally, each of the first and second etch stop layers which are bonded to an adjacent one of first, second and third layers are bonded to the adjacent layer by annealing. Preferably, the annealing bonding step is carried out at a temperature in the range of 900° C. to 1,200° C. Advantageously, the annealing bonding step is carried out at a temperature in the order of 1,000° C.
In one embodiment of the invention the first and second etch stop layers are oxide layers.
In another embodiment of the invention the second etch stop layer is patterned by depositing a photoresist layer on the second etch stop layer and exposing and developing a pattern which defines the component on the photoresist layer, and subsequently etching the second etch stop layer is define the component.
In another embodiment of the invention the first, second and third layers are of semiconductor material.
In one embodiment of the invention the first, second and third layers are of s
Blackstone Scott Carlton
Brown Stephen Alan
Gormley Colin Stephen
Analog Devices Inc.
Gauthier & Connors LLP
Lee Eddie
Vu Quang
LandOfFree
Method for forming a semiconductor device and a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming a semiconductor device and a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming a semiconductor device and a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3261479