Method for forming a photo diode and a CMOS transistor simultane

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation

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438 57, 438 60, 438 73, 257292, 257462, H01L 2100, H01L 31062

Patent

active

060906391

ABSTRACT:
The present invention provides a method of simultaneously forming a photo diode and a CMOS transistor on a semiconductor wafer. The surface of the semiconductor wafer comprising a P-type substrate with at least one N-channel MOS area for forming a NMOS transistor of the CMOS transistor, and a photo sensing area for forming the photo diode. The method employs a first ion implantation process to form a P-type well in the NMOS area. Next, a second ion implantation process simultaneously forms a first N-type doped area in a predetermined area of the photo sensing area and a lightly doped drain of the NMOS transistor on the surface of the P-type well of the N-channel MOS area. Finally, a third ion implantation process forms a second N-type doped area in part of the surface of the photo sensing area, and forms the source and drain of the NMOS in the P-type well of the NMOS. The second N-type doped area and the first N-type doped area of the photo sensing area are at least partially overlapping.

REFERENCES:
patent: 5319225 (1994-06-01), Kim
patent: 5903021 (1999-05-01), Lee et al.
patent: 5904493 (1999-05-01), Lee et al.
patent: 6040592 (2000-03-01), McDaniel et al.
patent: 6040593 (2000-03-01), Park

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