Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material
Reexamination Certificate
2009-01-20
2011-11-29
Richards, N. Drew (Department: 2895)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
C438S654000, C438S655000, C438S656000, C438S688000, C257S330000, C257S331000, C257SE21584
Reexamination Certificate
active
08067304
ABSTRACT:
A method is disclosed for forming a patterned thick metallization atop a semiconductor chip wafer. The method includes fabricating a nearly complete semiconductor chip wafer ready for metallization; depositing a bottom metal layer of sub-thickness TK1together with its built-in alignment mark using a hot metal process; depositing a top metal layer of sub-thickness TK2using a cold metal process thus forming a stacked thick metallization of total thickness TK=TK1+TK2; then, use the built-in alignment mark as reference, patterning the stacked thick metallization. A patterned thick metallization is thus formed with the advantages of better metal step coverage owing to the superior step coverage nature of the hot metal process as compared to the cold metal process; and lower alignment error rate owing to the lower alignment signal noise nature of the cold metal process as compared to the hot metal process.
REFERENCES:
patent: 5532179 (1996-07-01), Chang et al.
patent: 5763915 (1998-06-01), Hshieh et al.
patent: 5851920 (1998-12-01), Taylor et al.
Alpha and Omega Semiconductor Inc.
CH Emily LLC
Lee Kyoung
Richards N. Drew
Tsao Chein-Hwa
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