Fishing – trapping – and vermin destroying
Patent
1990-01-29
1991-06-11
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437203, 437913, 148DIG168, H01L 2144
Patent
active
050231960
ABSTRACT:
A MOSFET having a back-side source contact and top-side gate and drain contacts is provided by a structure comprising superposed N.sup.+, N-,P-, N.sup.+ regions arranged between top and bottom surfaces of the semiconductor die. In a preferred implementation, two trenches are etched from the top surface to the P-, N.sup.+ interface. A buried P-, N.sup.+ short is provided in one trench and a gate dielectric and gate electrode are provided over the sidewall P- region exposed in the other trench. This creates a vertical MOSFET in which the N.sup.+ substrate forms the source region shorted to the P- body region in which the channel is created by the gate. Superior performance is obtained in RF grounded-source circuit applications.
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Johnsen Robert J.
Sanders Paul W.
Barbee Joe E.
Fleck Linda J.
Handy Robert M.
Hearn Brian E.
Motorola Inc.
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