Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Patent
1995-08-16
1998-07-28
Graybill, David
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
438113, 438461, H01L 2160, H01L 2166, H01L 2170
Patent
active
057862370
ABSTRACT:
A fabrication method for manufacturing a monolithic electronic module comprising a plurality of stacked planar extending arrays of integrated circuit chips. The fabrication method includes dicing a wafer of integrated circuit chips into a plurality of arrays of integrated circuit chips. The arrays of integrated circuit chips are then stacked to form an electronic module. A metallization pattern may be deposited on a substantially planar surface of the electronic module, and used to interconnect the various arrays of integrated circuit chips contained therein. Specific details of the fabrication method and resultant multi-chip package are set forth.
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Cockerill Martha Ashley Clark
Maltabes John George
O'Connor Loretta Jean
Voldman Steven Howard
Graybill David
International Business Machines - Corporation
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