Semiconductor device manufacturing: process – Making passive device – Planar capacitor
Reexamination Certificate
2002-04-25
2004-08-24
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Making passive device
Planar capacitor
C438S396000
Reexamination Certificate
active
06780727
ABSTRACT:
TECHNICAL FIELD
The present invention relates to the fabrication of integrated circuits. More specifically, the present invention pertains to photolithography techniques for forming metal-insulator-metal (MIM) capacitors.
BACKGROUND ART
Photolithography techniques are used for fabricating components used in integrated circuits, such as metal-insulator-metal (MIM) capacitors (referred to also as metal-intermetal-metal capacitors). In the photolithography process, a pattern mask that defines the size and shape of a component (e.g., an electrode) in one layer of a MIM capacitor is applied to a photosensitive layer (e.g., photoresist) that has been applied over a metal layer. A stepper holds the pattern mask over the photoresist and projects the pattern image onto the photoresist through a lens. The pattern is imprinted into the photoresist; for example, the irradiated regions (e.g., the regions exposed through the pattern mask) are soluble in a specific solvent known as developer. The unexposed portions remain and thus the pattern is reproduced in the photoresist on the surface of the metal layer.
The portion of the metal layer not underlying the photoresist is then removed, usually by etching. The portion of the metal layer not removed will be in the shape of the component(s) defined by the pattern. This process is repeated as needed to build each layer of the MIM capacitor. A dielectric layer is present to separate the MIM capacitor electrodes.
Thus, the MIM capacitor is essentially built-up by forming a multitude of components in a number of layers, one layer on top of another. Because the components in one layer interconnect with components in other layers, it is necessary to ensure that the components are accurately positioned and formed. As components get even smaller, it is necessary to position and form components to increasingly finer tolerances.
Conventional techniques rely on accurate alignment of the stepper and its target in order to accurately form components. For geometries of 0.18 microns and less, accuracy is improved by applying an inorganic anti-reflective coating (ARC) such as silicon-oxy-nitride (SiON) to the metal layer prior to a stepper or scanner shot. The inorganic ARC reduces reflection from the metal layer, allowing the stepper or scanner to more accurately acquire the marks that are used to align the stepper (or scanner) and the target.
In the prior art, the inorganic ARC is not removed after the stepper or scanner shot because it cannot be easily removed by a post-masking etch or clean. The inorganic ARC thus remains a part of the MIM capacitor. However, the presence of the inorganic ARC in the MIM capacitor degrades the electrical performance of the capacitor. Specifically, the presence of the inorganic ARC reduces breakdown voltage and increases leakage current. For example, the breakdown voltage of a 400 Angstrom silane dioxide dielectric, using SiON as the inorganic ARC layer for the bottom electrode of a MIM capacitor, ranges from 26-32 volts.
Accordingly, what is needed is a method and/or system that can be used for fabricating MIM capacitors with improved electrical performance. For example, it is desirable to be able to fabricate MIM capacitors that have higher breakdown voltages and reduced leakage currents. It is also desirable to be able to fabricate MIM capacitors for which the variability of these parameters is reduced; that is, it is desirable for the range of values of breakdown voltage and leakage current to fall within a tighter tolerance band. The present invention provides a novel solution to these needs.
DISCLOSURE OF THE INVENTION
The present invention provides methods and systems thereof that can be used for fabricating MIM capacitors with improved electrical performance. For example, the present invention provides methods and systems for fabricating MIM capacitors that have higher breakdown voltages and reduced leakage currents. The present invention also provides methods and systems for fabricating MIM capacitors for which the variability of these parameters is reduced; that is, the range of values of breakdown voltage and leakage current falls within a tighter tolerance band.
The present embodiment of the present invention pertains to methods, and systems thereof, for forming a metal-insulator-metal (MIM) capacitor using an organic anti-reflective coating (ARC). The first electrode of the MIM capacitor is formed from a first metal layer. The organic ARC is applied, and the second electrode of the MIM capacitor is formed from a second metal layer. The organic ARC is then removed using a nominal clean technique.
According to the present invention, different types or brands of organic ARC can be used. In one embodiment, the organic ARC is AR2, and in another embodiment, the organic ARC is AR3. These or other types of organic ARC can be used interchangeably.
In one embodiment, the first and second metal layers are aluminum, and the dielectric separating the first and second electrodes is either silicon-nitrite or silicon-oxy-nitrite. In addition, a barrier layer can be disposed between the dielectric and each of the first and second metal layers. In one embodiment, the barrier layers are comprised of Ti-nitrite (TiN).
In one embodiment of a method for forming a MIM capacitor using organic ARC, a laminate that includes a first metal layer and a second metal layer separated by a dielectric and respective barrier layers is received by, for example, a stepper. A portion of the first metal layer and a portion of the dielectric (as well as the respective barrier layer) are removed to form the first electrode of the MIM capacitor. An organic ARC is applied to the first electrode and to the portion of the laminate exposed when the first metal layer and the dielectric were removed. A portion of the second metal layer and the respective barrier layer are removed to form the second electrode of the MIM capacitor. The remaining organic ARC is then removed (e.g., by cleaning).
In another embodiment of a method for forming a MIM capacitor using organic ARC, a first metal layer and a respective barrier layer are deposited on a substrate. A portion of the first metal layer (and the barrier layer) is removed to form the first electrode of the MIM capacitor. The dielectric and a second metal layer (and a respective barrier layer) are deposited on at least the first electrode. An organic ARC is applied to the resultant laminate, and a portion of the dielectric, the second metal layer and the respective barrier layer are removed to form the second electrode of the MIM capacitor. The remaining organic ARC is then removed (e.g., by cleaning).
In each of the embodiments described above, organic ARC can also be applied prior to formation of the first electrode.
Because the organic ARC is removed, the performance of the MIM capacitor is improved. Specifically, the breakdown voltage of the MIM capacitor increases and the leakage current decreases. In addition, the range of values for breakdown voltage and for leakage current is reduced, so that these parameters can be controlled within tighter tolerances.
These and other objects and advantages of the present invention will become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various drawing figures.
REFERENCES:
patent: 6171899 (2001-01-01), Liou et al.
patent: 6300240 (2001-10-01), Linliu et al.
patent: 6342734 (2002-01-01), Allman et al.
patent: 6459117 (2002-10-01), Liou
patent: 6576526 (2003-06-01), Kai et al.
Chu Sanford
Hwei Ng Chit
Kai Shao
Tjin Tjoa Tjin
Wen Bao Guang
Chartered Semiconductor Manufacturing Limited
Duy Mai Anh
Pham Long
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