Method for forming a metallization layer

Details Method for forming a metallization layer Method for forming a metallization layer

1996-06-03

1997-09-02

Niebling, John

Electrolysis: processes, compositions used therein, and methods

Electrolytic coating

Simultaneous deplating and plating

205103, 205118, 205123, 205157, 438641, H01L 21445

Patent

active

056627882

ABSTRACT:
A method for forming a metallization layer (30). A first layer (14) is formed outwardly from a semiconductor substrate (10). Contact vias (16) are formed through the first layer (14) to the semiconductor substrate (10). A second layer (20) is formed outwardly from the first layer (14). Portions of the second layer (20) are selectively removed such that the remaining portion of the second layer (20) defines the layout of the metallization layer (30) and the contact vias (16). The first and second layers (14) and (20) are electroplated by applying a bi-polar modulated voltage having a positive duty cycle and a negative duty cycle to the layers in a solution containing metal ions. The voltage and surface potentials are selected such that the metal ions are deposited on the remaining portions of the second layer (20). Further, metal ions deposited on the first layer (14) during a positive duty cycle are removed from the first layer (14) during a negative duty cycle. Finally, exposed portions of the first layer (14) are selectively removed.

REFERENCES:
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patent: 5188723 (1993-02-01), Yu et al.
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patent: 5336391 (1994-08-01), Rice
patent: 5366929 (1994-11-01), Cleeves et al.
patent: 5378310 (1995-01-01), Satoh et al.
patent: 5380679 (1995-01-01), Kano

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