Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
1999-11-02
2002-04-02
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S762000
Reexamination Certificate
active
06365972
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the invention
The present invention relates to a semiconductor device, and more particularly to a metal wiring structure and a method of forming a metal wiring structure, capable of enhancing the reliability of the semiconductor device by preventing diffusion of a conductive metal, such as, copper (Cu) in the metal wiring structure which prevents a parasitic capacitance.
2. Discussion of Related Art
In general, an aluminum or aluminum alloy film, which has high electrical conductivity and excellent adhesion to a silicon oxide film, is easily patterned by a dry etching method. The dry etching method is cost effective and has been widely used as a method for forming wiring of a semiconductor device. However, because semiconductor devices have been reduced in size, metal wiring requires finer multilayers, and the density thereof also increases. Consequently, poor step coverage results in a contact hole, a via, etc.
That is, in case of forming the metal wiring film by a conventional method, e.g., sputtering an aluminum or aluminum alloy film, a thickness of the metal wiring film is relatively thin in the bent (step) portion thereof due to a shadow effect. More particularly, this phenomenon seriously occurs in the contact hole when the aspect ratio is greater than one. Accordingly, instead of using a conventional physical deposition method, e.g. sputtering, or a chemical vapor deposition (CVD) method capable of depositing the wiring film in a uniform thickness, a tungsten film has been formed by a low pressure vapor deposition method to improve step coverage. However, the resistivity of the tungsten wiring film is twice the resistivity of an aluminum wiring film and, therefore, it is not effective to use tungsten as a wiring film.
Accordingly, in a manufacturing process of the semiconductor device, a method of forming a plug in a contact hole to form a metal wiring has been studied.
In the method for forming a plug mentioned above, the step of forming an aluminum film by a chemical vapor deposition method may be used to improve the, step coverage and to maintain continuity with the other conventional process of forming the aluminum wiring film, e.g., conventional sputtering, photographic etching, etc.
However, copper (Cu) has a lower resistivity than aluminum and has an excellent electromigration and stressmigration. Therefore, it is possible to enhance reliability of a semiconductor device using copper, instead of aluminum.
A method of forming a metal wiring film with copper (Cu) by sputtering or using a chemical vapor deposition (CVD) method has been used. Copper has a diffusion factor of about 10
−8
cm
2
/sec for diffusing into a silicon layer below the room temperature, which provides a very fast interstitial diffusion rate. The Cu diffused into the silicon layer acts as a recombination center to reduce the life of the minority carrier, thereby deteriorating the characteristic of the semiconductor device.
Accordingly, upon formation of the metal wiring with the copper, a barrier layer has to be formed between the Cu layer and the silicon substrate, as a diffusion barrier layer. The diffusion barrier layer may comprise of W, Ni
60
Nb
40
, amorphous W—Si, Ta, TiB
2
, Ta—Si—N and TiN, etc. Among the rest, TiN is widely used as the barrier layer of the aluminum wiring, and a chemical vapor deposition method using an organic metal source (MOCVD) is used to form the diffusion barrier layer. But, as the metal line becomes thinner, the occupation rate of the barrier layer in a deposition structure of the barrier layer and Cu increases and, thereby, the resistance reduction effect of copper decreases in accordance with the use of Cu.
Further, a method which suppresses a diffusion of the CU by covering the Cu film instead of using a barrier layer, generally uses a conductive material as an insulator film. However, in the conventional method's for forming metal wiring mentioned above, permittivity of the silicon film or aluminum is much greater than that of the silicon oxidation film. Accordingly, a parasitic capacitance of the metal wiring is increased, which deteriorates the performance of the semiconductor device.
Moreover, a metal or metal compound used to form an oxidation and diffusion barrier layer substantially reduces the space for forming a conduction line. As the need to miniaturize semiconductor devices increases, reduction of space for the conduction lines makes it more difficult to prevent breaks and defects in the formal conduction lines.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a metal wiring structure and a method of forming the same that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a metal wiring structure of copper (Cu) and a method thereof by forming a material layer capable of preventing a diffusion of copper in the metal wiring so as to effectively enhance reliability of the semiconductor device.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a metal wiring structure includes an insulator layer having an upper surface portion converted into a diffusion barrier layer, which is a transmutation layer, and a conductive layer formed on the insulator layer, wherein the diffusion barrier layer prevents diffusion of the conductive layer.
Further, the present invention is directed to a method of forming metal wiring of a semiconductor device, including the steps of: forming a trench in a given part of a silicon oxidation film formed on a semiconductor substrate; forming a transmutation layer on a surface of the silicon oxidation film; and depositing a conductive material on the transmutation layer to form a conduction line.
Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.
REFERENCES:
patent: 3765963 (1973-10-01), Okabe et al.
patent: 4698122 (1987-10-01), Wada et al.
patent: 5024724 (1991-06-01), Hirono et al.
patent: 5149378 (1992-09-01), Ohmi et al.
patent: 5654245 (1997-08-01), Allen
A Dual Damascene Hard Metal Capped CU and Al-Alloy for Interconnected Wiring of ULSI Circuits, H.M. Dalal et al., 0-7803-1450-6, 1993 IEEE, IDEM 93-273, pp. 11.4.1 to 11.4.4.
Birch & Stewart Kolasch & Birch, LLP
Hu Shouxiang
LG Semicon Co. Ltd.
Thomas Tom
LandOfFree
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