Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2001-07-02
2002-06-25
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S424000, C438S430000, C438S296000, C438S435000
Reexamination Certificate
active
06410405
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for forming a field oxide film on a semiconductor device, and more particularly, to a method for forming a field oxide film on a semiconductor device using a silicon epitaxial layer to improve a Shallow Trench Isolation (STI) process.
BACKGROUND OF THE INVENTION
FIGS. 1A
to
1
E illustrate, in sectional views, a conventional method for forming a field oxide film on a semiconductor device. As shown in
FIG. 1A
, a layer of pad oxide film
12
, a layer of silicon nitride film
14
, and a layer of photoresist film
16
are formed on a silicon substrate
10
. The photoresist film
16
is selectively exposed and developed to form a photoresist pattern
16
a
, as shown in FIG.
1
B. The silicon nitride film
14
and the pad oxide film
12
are typically removed sequentially using the photoresist pattern
16
a
as a mask to form a thermal oxidation mask comprising the silicon nitride film
14
a
and the pad oxide film pattern
12
a
. As shown in
FIG. 1C
, the exposed silicon substrate
10
is then removed to a desired depth using the thermal oxidation mask to form a channel
18
, after which the photoresist pattern
16
a
is removed.
Subsequently, as shown in
FIG. 1D
, an oxidation process is performed to form rounded corners of the channel
18
, and a silicon oxide film
20
is formed on the exposed surface of the channel
18
. The entire surface is then coated with a field oxide film
22
, e.g., by a Chemical Vapor Deposition (CVD) method, to cover the channel
18
. As shown in
FIG. 1E
, the field oxide film
22
is then selectively removed and planarized, e.g., by a Chemical Mechanical Polishing (CMP) process, using the silicon nitride film pattern
14
a
as an etching stop film. In a subsequent process, the silicon nitride film pattern
14
a
is removed by a wet etching process.
However, conventional methods for forming a field oxide film on a semiconductor device have several limitations. For example, the area of active silicon region is reduced during the oxidation process for making rounded channel edges (i.e., corners), typically in the amount of about 0.01 &mgr;m width. This reduction of the active silicon region affects the operational characteristics of a cell process significantly, especially for cells having a design rule of 0.1 &mgr;m or less. For example, in a cell having an active region width of about 0.1 &mgr;m, the width of the active region can be reduced to about 80 nm or less, which reduces the cell current by about 20% or more.
SUMMARY OF THE INVENTION
The present invention provides a method for forming a field oxide film on a semiconductor device. Methods of the present invention substantially obviate one or more problems in conventional field oxide film formation methods.
An object of the present invention is to provide a method of producing a field oxide film on a semiconductor device and minimize the amount of active region reduction during an STI process.
Another object of the present invention is to provide a method of producing a field oxide film on a semiconductor device and minimize the amount of cell current reduction in the resulting semiconductor device.
Yet another object of the present invention is to provide a method of producing a field oxide film on a semiconductor device and reduce the ohmic contact during self-alignment contact, thereby improving the circuit operational speed.
Accordingly, the present invention provides a method for forming a field oxide film on a semiconductor device comprising the steps of:
producing a thermal oxidation mask on a silicon substrate;
producing a channel on said silicon substrate using said thermal oxidation mask;
producing a silicon epitaxial layer on the surface of said silicon substrate channel;
producing a spacer mask on side surfaces of said thermal oxidation mask;
producing a smooth edged silicon epitaxial layer near the interface between said spacer mask and said silicon epitaxial layer; and
producing a field oxide film on said silicon substrate.
In one embodiment of the present invention, the thermal oxidation mask comprises silicon nitride film. The thermal oxidation mask can further comprise a pad oxide film disposed between the silicon substrate and the silicon nitride film.
In another embodiment of the present invention, the spacer mask comprises silicon oxide.
The smooth edged silicon epitaxial layer producing step can include oxidizing the silicon epitaxial layer under conditions sufficient to form a layer of silicon oxide film on the silicon epitaxial layer and the smooth edged silicon epitaxial layer near the interface between the spacer mask and the silicon epitaxial layer. Preferably, the thickness of the silicon epitaxial layer is from about 50 to about 100 Å.
The spacer mask producing step can comprise coating the silicon substrate with a silicon oxide film and removing the silicon oxide film under conditions sufficient to produce the spacer mask. Preferably, the silicon oxide film coating thickness is from about 50 to about 100 Å.
The field oxide film producing step can include producing a layer of field oxide film material on the silicon substrate and planarizing the field oxide film material using the thermal oxidation mask, e.g., silicon nitride film, as an etching stop film. Preferably, field oxide film material is planarized using a CMP process.
Another aspect of the present invention provides a method for forming a field oxide film on a semiconductor device comprising the steps of:
forming a thermal oxidation mask on a silicon substrate, wherein said thermal oxidation mask comprises silicon nitride film;
forming a channel on the exposed regions of said silicon substrate;
forming a silicon epitaxial layer on the surface of said silicon substrate channel;
forming an oxide film spacer mask on side surfaces of said thermal oxidation mask;
forming a smooth edged silicon epitaxial layer near the interface between said oxide film spacer mask and said silicon epitaxial layer by oxidizing the exposed silicon epitaxial layer; and
forming a field oxide film on said silicon substrate.
REFERENCES:
patent: 4666556 (1987-05-01), Fulton et al.
patent: 6025249 (2000-02-01), Kuo
patent: 6143624 (2000-11-01), Keper et al.
patent: 6184108 (2001-02-01), Omid-Zohoor et al.
patent: 6251750 (2001-06-01), Lee
patent: 6274455 (2001-08-01), Seo
Aoki, M. et al.; “Quarter-micron Selective-Epitaxial-Silicon Refilled Trench (SRT) Isolation Technology with Substrate Shield”; 1991; IEEE; pp. 447-450.
Hyundai Electronics Industries Co,. Ltd.
Pompey Ron
LandOfFree
Method for forming a field oxide film on a semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming a field oxide film on a semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming a field oxide film on a semiconductor... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2893413