Method for forming a DRAM cell with a stacked capacitor

Details Method for forming a DRAM cell with a stacked capacitor Method for forming a DRAM cell with a stacked capacitor

1998-03-17

2000-11-14

Smith, Matthew

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

438397, 438398, 438399, 438253, H01L 2120

Patent

active

061469629

ABSTRACT:
A dynamic random-access-memory (DRAM) cell with a fin or wing-type stacked capacitor is fabricated by using a layer of polysilicon as an etch stop rather than the layer of nitride that is conventionally used. By using the layer of polysilicon, the problem of hydrogen-enhanced boron diffusion in dual work function CMOS transistors is eliminated while at the same time increasing the capacitance of the stacked capacitor without substantially increasing the step height of the capacitor.

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patent: 5891772 (1999-04-01), Hsu
patent: 5930626 (1999-07-01), Park
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