Method for forming a die-attach layer during semiconductor...

Details Method for forming a die-attach layer during semiconductor... Method for forming a die-attach layer during semiconductor...

2008-01-04

2009-10-20

Purvis, Sue (Department: 2895)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

C438S124000, C438S126000, C438S127000

Reexamination Certificate

active

07605018

ABSTRACT:
Disclosed is a method for forming a die-attach layer during semiconductor packaging processes. A chip carrier includes a substrate core and a stiffener. Top surface of the substrate core includes a plurality of die-attaching units and a peripheral area enclosed by the stiffener. A non-planar printing stencil is also provided. When the non-planar printing stencil is pressed against the chip carrier, the non-planar printing stencil is compliantly in contact with the substrate core and the stiffener and a plurality of printing openings of the non-planar printing stencil exposes the substrate core within the die-attaching units. During stencil printing, die-attach material fills in the printing openings to directly adhere to the substrate core. Therefore, the warpage of the substrate core is restrained to avoid bleeding of die-attach material so that die-attach materials can be formed as a die-attach layer with a uniform thickness on core-exposed chip carrier with lower costs. Additionally, the chip carrier will not be deformed during semiconductor packaging processes.

REFERENCES:
patent: 2003/0030140 (2003-02-01), Shim
patent: 2007/0040261 (2007-02-01), Hetzel et al.

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